JPS55162252A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS55162252A JPS55162252A JP7034579A JP7034579A JPS55162252A JP S55162252 A JPS55162252 A JP S55162252A JP 7034579 A JP7034579 A JP 7034579A JP 7034579 A JP7034579 A JP 7034579A JP S55162252 A JPS55162252 A JP S55162252A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor element
- lead
- resin body
- sides
- bevel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
PURPOSE:To prevent resin from cracking by the method wherein, the end parts of each side of the main four sides of a resin body sealing a semiconductor element, at least one place is beveled, and at least one lead for supporting the element fixing surface is taken out therefrom. CONSTITUTION:Semiconductor element 3 is mounted on semiconductor element fastening unit 1. These are surrounded by a resin body having radial leads. Next, semiconductor element fastening unit supporting lead 2a is pulled out from the end of each side of the four sides of fastening unit 1 and this is fixed to frame 8 placed outside of the resin body. At this time, at least one place of the ends of each side of the four sides is provided with bevel 7, from which at least one lead 2a is pulled out. In this structure, length l1 of the corner bevel is made larger than width l2 taken by the surface bevel, and thereby the strain applied on the resin body at the time of cutting lead 2a for shaping the product is made even and thereby the occurrence of cracks is prevented.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7034579A JPS55162252A (en) | 1979-06-05 | 1979-06-05 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7034579A JPS55162252A (en) | 1979-06-05 | 1979-06-05 | Semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS55162252A true JPS55162252A (en) | 1980-12-17 |
JPS6227548B2 JPS6227548B2 (en) | 1987-06-15 |
Family
ID=13428731
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7034579A Granted JPS55162252A (en) | 1979-06-05 | 1979-06-05 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS55162252A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5861654A (en) * | 1981-10-09 | 1983-04-12 | Toshiba Corp | Semiconductor device |
JPS58111966U (en) * | 1982-01-25 | 1983-07-30 | 松下電器産業株式会社 | integrated circuit components |
US7989933B1 (en) * | 2008-10-06 | 2011-08-02 | Amkor Technology, Inc. | Increased I/O leadframe and semiconductor device including same |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS505329U (en) * | 1973-05-16 | 1975-01-21 | ||
JPS5116698U (en) * | 1974-07-24 | 1976-02-06 | ||
JPS52106674A (en) * | 1976-03-05 | 1977-09-07 | Hitachi Ltd | Semiconductor device |
JPS54180668U (en) * | 1978-06-09 | 1979-12-20 |
-
1979
- 1979-06-05 JP JP7034579A patent/JPS55162252A/en active Granted
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS505329U (en) * | 1973-05-16 | 1975-01-21 | ||
JPS5116698U (en) * | 1974-07-24 | 1976-02-06 | ||
JPS52106674A (en) * | 1976-03-05 | 1977-09-07 | Hitachi Ltd | Semiconductor device |
JPS54180668U (en) * | 1978-06-09 | 1979-12-20 |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5861654A (en) * | 1981-10-09 | 1983-04-12 | Toshiba Corp | Semiconductor device |
JPH0159741B2 (en) * | 1981-10-09 | 1989-12-19 | Tokyo Shibaura Electric Co | |
JPS58111966U (en) * | 1982-01-25 | 1983-07-30 | 松下電器産業株式会社 | integrated circuit components |
JPH0126108Y2 (en) * | 1982-01-25 | 1989-08-04 | ||
US7989933B1 (en) * | 2008-10-06 | 2011-08-02 | Amkor Technology, Inc. | Increased I/O leadframe and semiconductor device including same |
Also Published As
Publication number | Publication date |
---|---|
JPS6227548B2 (en) | 1987-06-15 |
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