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Priority to JP13508976ApriorityCriticalpatent/JPS5360129A/ja
Publication of JPS5360129ApublicationCriticalpatent/JPS5360129A/ja
Publication of JPS551619B2publicationCriticalpatent/JPS551619B2/ja
G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
G06F7/50—Adding; Subtracting
G06F7/501—Half or full adders, i.e. basic adder cells for one denomination
G06F7/503—Half or full adders, i.e. basic adder cells for one denomination using carry switching, i.e. the incoming carry being connected directly, or only via an inverter, to the carry output under control of a carry propagate signal