JPS55160425A - Method of manufacturing multiistage semiconductor device - Google Patents

Method of manufacturing multiistage semiconductor device

Info

Publication number
JPS55160425A
JPS55160425A JP7214180A JP7214180A JPS55160425A JP S55160425 A JPS55160425 A JP S55160425A JP 7214180 A JP7214180 A JP 7214180A JP 7214180 A JP7214180 A JP 7214180A JP S55160425 A JPS55160425 A JP S55160425A
Authority
JP
Japan
Prior art keywords
multiistage
manufacturing
semiconductor device
semiconductor
multiistage semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7214180A
Other languages
English (en)
Inventor
Ai Sumisu Henrii
Shii Furandaasu Deeru
Daburiyuu Geizu Maikeru
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Massachusetts Institute of Technology
Original Assignee
Massachusetts Institute of Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Massachusetts Institute of Technology filed Critical Massachusetts Institute of Technology
Publication of JPS55160425A publication Critical patent/JPS55160425A/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/04Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
    • H01L29/045Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes by their particular orientation of crystalline planes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8221Three dimensional integrated circuits stacked in different levels
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0688Integrated circuits having a three-dimensional layout
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02373Group 14 semiconducting materials
    • H01L21/02381Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02488Insulating materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Recrystallisation Techniques (AREA)
  • Photovoltaic Devices (AREA)
JP7214180A 1979-05-29 1980-05-29 Method of manufacturing multiistage semiconductor device Pending JPS55160425A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US4338979A 1979-05-29 1979-05-29

Publications (1)

Publication Number Publication Date
JPS55160425A true JPS55160425A (en) 1980-12-13

Family

ID=21926927

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7214180A Pending JPS55160425A (en) 1979-05-29 1980-05-29 Method of manufacturing multiistage semiconductor device

Country Status (2)

Country Link
EP (1) EP0020135A1 (ja)
JP (1) JPS55160425A (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57180161A (en) * 1981-04-30 1982-11-06 Toshiba Corp Semiconductor device
US4472729A (en) * 1981-08-31 1984-09-18 Tokyo Shibaura Denki Kabushiki Kaisha Recrystallized three dimensional integrated circuit

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5853822A (ja) * 1981-09-25 1983-03-30 Toshiba Corp 積層半導体装置
US4489478A (en) * 1981-09-29 1984-12-25 Fujitsu Limited Process for producing a three-dimensional semiconductor device
JPH0612799B2 (ja) * 1986-03-03 1994-02-16 三菱電機株式会社 積層型半導体装置およびその製造方法
JP2505754B2 (ja) * 1986-07-11 1996-06-12 キヤノン株式会社 光電変換装置の製造方法
DE69023765T2 (de) * 1990-07-31 1996-06-20 Ibm Verfahren zur Herstellung von Bauelementen mit übereinander angeordneten Feldeffekttransistoren mit Wolfram-Gitter und sich daraus ergebende Struktur.
GB9303541D0 (en) * 1992-03-11 1993-04-07 Zeneca Resins Bv Aqueous coating compositions

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3613226A (en) * 1964-08-18 1971-10-19 Texas Instruments Inc Three-dimensional integrated circuits and methods of making same
GB1112992A (en) * 1964-08-18 1968-05-08 Texas Instruments Inc Three-dimensional integrated circuits and methods of making same
DE1589705A1 (de) * 1967-11-15 1970-04-30 Itt Ind Gmbh Deutsche Mehrere elektrische Funktionsstufen enthaltende integrierte Schaltung
US3519901A (en) * 1968-01-29 1970-07-07 Texas Instruments Inc Bi-layer insulation structure including polycrystalline semiconductor material for integrated circuit isolation
FR2072083B1 (ja) * 1969-12-29 1975-01-10 Ibm
NL7306948A (ja) * 1973-05-18 1974-11-20

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57180161A (en) * 1981-04-30 1982-11-06 Toshiba Corp Semiconductor device
US4472729A (en) * 1981-08-31 1984-09-18 Tokyo Shibaura Denki Kabushiki Kaisha Recrystallized three dimensional integrated circuit

Also Published As

Publication number Publication date
EP0020135A1 (en) 1980-12-10

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