JPS55154646A - Timing unit - Google Patents

Timing unit

Info

Publication number
JPS55154646A
JPS55154646A JP6287579A JP6287579A JPS55154646A JP S55154646 A JPS55154646 A JP S55154646A JP 6287579 A JP6287579 A JP 6287579A JP 6287579 A JP6287579 A JP 6287579A JP S55154646 A JPS55154646 A JP S55154646A
Authority
JP
Japan
Prior art keywords
counter
initial value
memory
program
count
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6287579A
Other languages
Japanese (ja)
Inventor
Masatoshi Tanaka
Seijiro Matsumoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP6287579A priority Critical patent/JPS55154646A/en
Publication of JPS55154646A publication Critical patent/JPS55154646A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To change the timing time without changing the content of program memory, by storing the timing time number data being the initial value of a counter of timing unit in the separate intial value memory other than the memory storing the program of CPU.
CONSTITUTION: The timing time data being the initial value of a counter 4 of a timing unit 10 is stored in a separate initial value memory 1 other than the program memory storing the program of a CPU2. Further, if the start of the counter 4 is required, the counter 4 is set with the initial value stored in the initial value memory 1 according to the address selected with an address selection circuit 3, count is repeated every time clock pulse is fed to the counter 4, and when the count value of the counter 4 reaches a preset count value, the count end signal from the CPU2 is fed to the counter 4. Further, the change of the clock time can easily be made with the replacement or rewrite-in of the initial value memory 1.
COPYRIGHT: (C)1980,JPO&Japio
JP6287579A 1979-05-22 1979-05-22 Timing unit Pending JPS55154646A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6287579A JPS55154646A (en) 1979-05-22 1979-05-22 Timing unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6287579A JPS55154646A (en) 1979-05-22 1979-05-22 Timing unit

Publications (1)

Publication Number Publication Date
JPS55154646A true JPS55154646A (en) 1980-12-02

Family

ID=13212870

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6287579A Pending JPS55154646A (en) 1979-05-22 1979-05-22 Timing unit

Country Status (1)

Country Link
JP (1) JPS55154646A (en)

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