JPS55150233A - Apparatus for treating semiconductor wafer - Google Patents

Apparatus for treating semiconductor wafer

Info

Publication number
JPS55150233A
JPS55150233A JP4463480A JP4463480A JPS55150233A JP S55150233 A JPS55150233 A JP S55150233A JP 4463480 A JP4463480 A JP 4463480A JP 4463480 A JP4463480 A JP 4463480A JP S55150233 A JPS55150233 A JP S55150233A
Authority
JP
Japan
Prior art keywords
etching solution
flowing paths
solution
box
tank
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4463480A
Other languages
Japanese (ja)
Other versions
JPS5734651B2 (en
Inventor
Tamotsu Sasaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP4463480A priority Critical patent/JPS55150233A/en
Publication of JPS55150233A publication Critical patent/JPS55150233A/en
Publication of JPS5734651B2 publication Critical patent/JPS5734651B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • ing And Chemical Polishing (AREA)
  • Weting (AREA)

Abstract

PURPOSE:To enable visual observation of the etching state of a plurality of semiconductor wafers arranged in an etching solution flowing paths and reduce the damage of the wafers by employing an etching apparatus having a plurality of oblique etching solution flowing paths on one side surface in a box. CONSTITUTION:There are provided an oblique surface plate on which a plurality of etching solution flowing paths are defined via projections 12 opposed on one side surface of a box 11, a plurality of wafer mounting plates 14 being longitudinally aligned in the respective flowing paths, and a plurality of projections 13 having lower height for holding the wafers as the lower ends of the plates 14. An etching solution efflux tank 16 for containing the etching solution is provided at the upper end of the box 11, and slits 15 for flowing the solution are formed at the tank in opposed manner with the respective flowing paths. Wafers 10 are arranged in the respective flowing paths thus constructed, and the etching solution is flowed from the tank 16. The solution thus flowed is accumulated through the solution reservoir 19 at the bottom of the box 11. At this time the upper and lower solutions are circulated through liquid feed tubes 17, 18 and 20, an intermediate tank 22, a constant-temperature oven 23, a liquid pump 21. etc.
JP4463480A 1980-04-07 1980-04-07 Apparatus for treating semiconductor wafer Granted JPS55150233A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4463480A JPS55150233A (en) 1980-04-07 1980-04-07 Apparatus for treating semiconductor wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4463480A JPS55150233A (en) 1980-04-07 1980-04-07 Apparatus for treating semiconductor wafer

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP3962572A Division JPS5546054B2 (en) 1972-04-21 1972-04-21

Publications (2)

Publication Number Publication Date
JPS55150233A true JPS55150233A (en) 1980-11-22
JPS5734651B2 JPS5734651B2 (en) 1982-07-24

Family

ID=12696852

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4463480A Granted JPS55150233A (en) 1980-04-07 1980-04-07 Apparatus for treating semiconductor wafer

Country Status (1)

Country Link
JP (1) JPS55150233A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102007058876A1 (en) * 2007-12-06 2009-06-10 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Method for processing wafer surfaces in the production of solar cells comprises inserting wafers into a treatment chamber, contacting with an alkaline treatment solution containing a texturing agent and further processing

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6268349U (en) * 1985-10-17 1987-04-28

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102007058876A1 (en) * 2007-12-06 2009-06-10 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Method for processing wafer surfaces in the production of solar cells comprises inserting wafers into a treatment chamber, contacting with an alkaline treatment solution containing a texturing agent and further processing

Also Published As

Publication number Publication date
JPS5734651B2 (en) 1982-07-24

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