JPS5513831B2 - - Google Patents
Info
- Publication number
- JPS5513831B2 JPS5513831B2 JP15266575A JP15266575A JPS5513831B2 JP S5513831 B2 JPS5513831 B2 JP S5513831B2 JP 15266575 A JP15266575 A JP 15266575A JP 15266575 A JP15266575 A JP 15266575A JP S5513831 B2 JPS5513831 B2 JP S5513831B2
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Die Bonding (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15266575A JPS5275639A (en) | 1975-12-19 | 1975-12-19 | Brazing method and device thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15266575A JPS5275639A (en) | 1975-12-19 | 1975-12-19 | Brazing method and device thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5275639A JPS5275639A (en) | 1977-06-24 |
| JPS5513831B2 true JPS5513831B2 (US06589383-20030708-C00041.png) | 1980-04-11 |
Family
ID=15545400
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15266575A Granted JPS5275639A (en) | 1975-12-19 | 1975-12-19 | Brazing method and device thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5275639A (US06589383-20030708-C00041.png) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60142801A (ja) * | 1983-12-29 | 1985-07-29 | 元田 安弘 | はきものの足固定用すべり止め |
| JPH03127501U (US06589383-20030708-C00041.png) * | 1990-04-02 | 1991-12-24 |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5482168A (en) * | 1977-12-14 | 1979-06-30 | Fujitsu Ltd | Diboinding method for semiconductor chip |
-
1975
- 1975-12-19 JP JP15266575A patent/JPS5275639A/ja active Granted
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60142801A (ja) * | 1983-12-29 | 1985-07-29 | 元田 安弘 | はきものの足固定用すべり止め |
| JPH03127501U (US06589383-20030708-C00041.png) * | 1990-04-02 | 1991-12-24 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5275639A (en) | 1977-06-24 |
