JPS55123744A - Logic integrated circuit easy to check - Google Patents

Logic integrated circuit easy to check

Info

Publication number
JPS55123744A
JPS55123744A JP3025479A JP3025479A JPS55123744A JP S55123744 A JPS55123744 A JP S55123744A JP 3025479 A JP3025479 A JP 3025479A JP 3025479 A JP3025479 A JP 3025479A JP S55123744 A JPS55123744 A JP S55123744A
Authority
JP
Japan
Prior art keywords
circuit
input signal
check
integrated circuit
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3025479A
Other languages
Japanese (ja)
Other versions
JPS6153742B2 (en
Inventor
Yoshihiro Kasuya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP3025479A priority Critical patent/JPS55123744A/en
Priority to DE19803009945 priority patent/DE3009945A1/en
Priority to GB8008774A priority patent/GB2049958B/en
Priority to FR8005815A priority patent/FR2451672A1/en
Priority to US06/130,687 priority patent/US4366393A/en
Publication of JPS55123744A publication Critical patent/JPS55123744A/en
Priority to GB08311223A priority patent/GB2125170B/en
Priority to US06/545,608 priority patent/US4536881A/en
Publication of JPS6153742B2 publication Critical patent/JPS6153742B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Tests Of Electronic Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

PURPOSE: To make it possible to observe easily the check result, by converting the input signal from the external to a false check input signal at a fault time and by leading this signal to a combinational logic circuit and by accumulating a part of the output in a feedback shift register.
CONSTITUTION: In the logic integrated circuit such as a programmable logic array incorporating FF, output signals of FF231...23N are applied to the input of logic circuit 1 to perform a normal circuit operation at a normal operation time. Meanwhile, at a fault time, input signal X applied from the external is inputted to input signal converting circuit 3 and is converted to false check input signal 106 and is led to circuit 1, and output signal Y of circuit 1 is accumulated in feedback shift register 2 constituted by FF231...23N. As a result, the check result can be observed easily.
COPYRIGHT: (C)1980,JPO&Japio
JP3025479A 1979-03-15 1979-03-15 Logic integrated circuit easy to check Granted JPS55123744A (en)

Priority Applications (7)

Application Number Priority Date Filing Date Title
JP3025479A JPS55123744A (en) 1979-03-15 1979-03-15 Logic integrated circuit easy to check
DE19803009945 DE3009945A1 (en) 1979-03-15 1980-03-14 INTEGRATED, LOGICAL CIRCUIT WITH FUNCTIONAL TEST
GB8008774A GB2049958B (en) 1979-03-15 1980-03-14 Integrated logic circuit adapted to performance tests
FR8005815A FR2451672A1 (en) 1979-03-15 1980-03-14 INTEGRATED LOGIC CIRCUIT FOR TEST EXECUTION
US06/130,687 US4366393A (en) 1979-03-15 1980-03-17 Integrated logic circuit adapted to performance tests
GB08311223A GB2125170B (en) 1979-03-15 1983-04-25 Integrated logic circuit adapted to performance tests
US06/545,608 US4536881A (en) 1979-03-15 1983-10-27 Integrated logic circuit adapted to performance tests

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3025479A JPS55123744A (en) 1979-03-15 1979-03-15 Logic integrated circuit easy to check

Publications (2)

Publication Number Publication Date
JPS55123744A true JPS55123744A (en) 1980-09-24
JPS6153742B2 JPS6153742B2 (en) 1986-11-19

Family

ID=12298566

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3025479A Granted JPS55123744A (en) 1979-03-15 1979-03-15 Logic integrated circuit easy to check

Country Status (1)

Country Link
JP (1) JPS55123744A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5988663A (en) * 1982-11-08 1984-05-22 インタ−ナシヨナル　ビジネス　マシ−ンズ　コ−ポレ−シヨン Self-test method
JPS5988664A (en) * 1982-11-08 1984-05-22 インタ−ナシヨナル　ビジネス　マシ−ンズ　コ−ポレ−シヨン Self-test set
WO2015008843A1 (en) * 2013-07-17 2015-01-22 国立大学法人大分大学 Scan bist lfsr seed generation method and memory medium for storing program for same

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5988663A (en) * 1982-11-08 1984-05-22 インタ−ナシヨナル　ビジネス　マシ−ンズ　コ−ポレ−シヨン Self-test method
JPS5988664A (en) * 1982-11-08 1984-05-22 インタ−ナシヨナル　ビジネス　マシ−ンズ　コ−ポレ−シヨン Self-test set
JPH0150873B2 (en) * 1982-11-08 1989-10-31 Intaanashonaru Bijinesu Mashiinzu Corp
JPH0150874B2 (en) * 1982-11-08 1989-10-31 Intaanashonaru Bijinesu Mashiinzu Corp
WO2015008843A1 (en) * 2013-07-17 2015-01-22 国立大学法人大分大学 Scan bist lfsr seed generation method and memory medium for storing program for same
JP2015038473A (en) * 2013-07-17 2015-02-26 国立大学法人 大分大学 Method for generating lfsr seed of scan bist and storage medium for storing program therefor

Also Published As

Publication number Publication date
JPS6153742B2 (en) 1986-11-19

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