JPS55121751A - Duplex communication terminal circuit - Google Patents
Duplex communication terminal circuitInfo
- Publication number
- JPS55121751A JPS55121751A JP2919979A JP2919979A JPS55121751A JP S55121751 A JPS55121751 A JP S55121751A JP 2919979 A JP2919979 A JP 2919979A JP 2919979 A JP2919979 A JP 2919979A JP S55121751 A JPS55121751 A JP S55121751A
- Authority
- JP
- Japan
- Prior art keywords
- terminal
- wire
- signal sent
- balanced
- duplex communication
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
- H04B1/40—Circuits
- H04B1/54—Circuits using the same frequency for two directions of communication
- H04B1/58—Hybrid arrangements, i.e. arrangements for transition from single-path two-direction transmission to single-direction transmission on each of two paths or vice versa
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Devices For Supply Of Signal Current (AREA)
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
Abstract
PURPOSE:To realize the duplex communication terminal circuit which features the 2-wire/4-wire converting function with a compact design and low cost, by supplying the necessary DC current to the terminal unit via the terminal termination impedance and then securing the high impedance for other circuits. CONSTITUTION:The 2-wire type balanced terminal is connected to terminals 11 and 12, and the current is supplied to the balanced terminal from DC power source 18 via termination resistances 161 and 162. Then constant current source 23 of the high internal resistance is connected to the unbalanced side winding of the balance-unbalance converting transformer; and the signal sent from terminal 14 is transmitted to the 2-wire side. At the same time, amplifier 22 of the high input impedance applies the signal sent from the 2-wire side to differential amplifier 24 to which balanced circuit network 19 is connected. And the signal sent from the 2-wire side is obtained at terminal 13.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2919979A JPS55121751A (en) | 1979-03-13 | 1979-03-13 | Duplex communication terminal circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2919979A JPS55121751A (en) | 1979-03-13 | 1979-03-13 | Duplex communication terminal circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS55121751A true JPS55121751A (en) | 1980-09-19 |
Family
ID=12269518
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2919979A Pending JPS55121751A (en) | 1979-03-13 | 1979-03-13 | Duplex communication terminal circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS55121751A (en) |
-
1979
- 1979-03-13 JP JP2919979A patent/JPS55121751A/en active Pending
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
LAPS | Cancellation because of no payment of annual fees |