JPS55107978A - Tempo display controller for automatic rhythmic device - Google Patents

Tempo display controller for automatic rhythmic device

Info

Publication number
JPS55107978A
JPS55107978A JP1520779A JP1520779A JPS55107978A JP S55107978 A JPS55107978 A JP S55107978A JP 1520779 A JP1520779 A JP 1520779A JP 1520779 A JP1520779 A JP 1520779A JP S55107978 A JPS55107978 A JP S55107978A
Authority
JP
Japan
Prior art keywords
signal
tempo
gate
time duration
counter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1520779A
Other languages
Japanese (ja)
Inventor
Akira Nakada
Akio Imamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Gakki Co Ltd
Original Assignee
Nippon Gakki Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Gakki Co Ltd filed Critical Nippon Gakki Co Ltd
Priority to JP1520779A priority Critical patent/JPS55107978A/en
Publication of JPS55107978A publication Critical patent/JPS55107978A/en
Pending legal-status Critical Current

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  • Electrophonic Musical Instruments (AREA)

Abstract

PURPOSE: To stably indicate tempo without flicker by synchronizing the leading edge of the time duration for counting a tempo clock signal with a tempo clock signal.
CONSTITUTION: A signal from a tempo osciilator 16 is converted through a differentiating circuit 18 to a tempo clock signal TC, which is supplied to a frequency divider 19 and an automatic rhythimic generator 20 and to a counter 23. On the other hand, a standard time signal generator 34 for setting a counting time duration at the counter 23 generates a signal P having predetermined time duration, which is supplied to a latch 29 and an OR gate 30. The output Q of a bit memory having an OR gate 30 and a delay circuit 31 or the like is applied to an AND gate 34 together with a signal TC. The output from the AND gate 34 is applied as a rest signal to counters 23, 26. Since the signal TC is synchronized with the leading edge of the time duration to count the same number of the signals TC by the counter 23, it can stably indicate the tempo without flicker.
COPYRIGHT: (C)1980,JPO&Japio
JP1520779A 1979-02-13 1979-02-13 Tempo display controller for automatic rhythmic device Pending JPS55107978A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1520779A JPS55107978A (en) 1979-02-13 1979-02-13 Tempo display controller for automatic rhythmic device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1520779A JPS55107978A (en) 1979-02-13 1979-02-13 Tempo display controller for automatic rhythmic device

Publications (1)

Publication Number Publication Date
JPS55107978A true JPS55107978A (en) 1980-08-19

Family

ID=11882416

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1520779A Pending JPS55107978A (en) 1979-02-13 1979-02-13 Tempo display controller for automatic rhythmic device

Country Status (1)

Country Link
JP (1) JPS55107978A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4988557A (en) * 1972-12-23 1974-08-23
JPS5172478A (en) * 1974-12-20 1976-06-23 Torio Kk SHUHASUKAUNTA
JPS5361375A (en) * 1976-11-15 1978-06-01 Toshiba Corp Counting circuit apparatus

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4988557A (en) * 1972-12-23 1974-08-23
JPS5172478A (en) * 1974-12-20 1976-06-23 Torio Kk SHUHASUKAUNTA
JPS5361375A (en) * 1976-11-15 1978-06-01 Toshiba Corp Counting circuit apparatus

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