JPS55103741A - Wiring method - Google Patents

Wiring method

Info

Publication number
JPS55103741A
JPS55103741A JP1088479A JP1088479A JPS55103741A JP S55103741 A JPS55103741 A JP S55103741A JP 1088479 A JP1088479 A JP 1088479A JP 1088479 A JP1088479 A JP 1088479A JP S55103741 A JPS55103741 A JP S55103741A
Authority
JP
Japan
Prior art keywords
layer wiring
pitch
wiring
minimum permissible
minimum
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1088479A
Other languages
Japanese (ja)
Other versions
JPS6216545B2 (en
Inventor
Hideo Kikuchi
Ryusuke Hoshikawa
Shoji Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP1088479A priority Critical patent/JPS55103741A/en
Publication of JPS55103741A publication Critical patent/JPS55103741A/en
Publication of JPS6216545B2 publication Critical patent/JPS6216545B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

PURPOSE: To increase the degree of integration without increasing the intervals among the wirings of various layers, by determining the grid distance on the basis of the minimum wiring pitch of each layer.
CONSTITUTION: Let the minimum permissible pitch of No.1 layer wiring be 10μm and the minimum permissible pitch of No.2 layer wiring 15μm. Then, the grid distance d is their greatest common divisor 5μm. By drawing No.1 layer wiring on every other line and No.2 layer wiring on every third line, it is possible to secure easily the minimum permissible distance.
COPYRIGHT: (C)1980,JPO&Japio
JP1088479A 1979-02-01 1979-02-01 Wiring method Granted JPS55103741A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1088479A JPS55103741A (en) 1979-02-01 1979-02-01 Wiring method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1088479A JPS55103741A (en) 1979-02-01 1979-02-01 Wiring method

Publications (2)

Publication Number Publication Date
JPS55103741A true JPS55103741A (en) 1980-08-08
JPS6216545B2 JPS6216545B2 (en) 1987-04-13

Family

ID=11762733

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1088479A Granted JPS55103741A (en) 1979-02-01 1979-02-01 Wiring method

Country Status (1)

Country Link
JP (1) JPS55103741A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0515513U (en) * 1991-07-30 1993-02-26 船井電機株式会社 Antenna structure

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0515513U (en) * 1991-07-30 1993-02-26 船井電機株式会社 Antenna structure

Also Published As

Publication number Publication date
JPS6216545B2 (en) 1987-04-13

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