JPS5498131A - Input/output control system - Google Patents
Input/output control systemInfo
- Publication number
- JPS5498131A JPS5498131A JP430078A JP430078A JPS5498131A JP S5498131 A JPS5498131 A JP S5498131A JP 430078 A JP430078 A JP 430078A JP 430078 A JP430078 A JP 430078A JP S5498131 A JPS5498131 A JP S5498131A
- Authority
- JP
- Japan
- Prior art keywords
- ccb
- completion
- processing
- devices
- flag
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
PURPOSE: To make the control of I/O devices possible by providing two kinds of flag corresponding to the number of I/O devices on the main memory and regarding contents of flags and setting or resetting flags.
CONSTITUTION: Channel control block CCB is provided as control information for devices. Flag A is provided for preventing information other than CCB from being read out erroneously from the main memory and the needless CCB processing from being repeated, for example, i case that data is inputted erroneously from a device which CCB is not prepared previously for or interruption is caused to CCB after the completion of the processing for this CCB. Flag B is provided for confirming the completion of the device-side output operation at a WRITE operation time, and is generated immediately after the completion of the output operation to complete the CCB processing.
COPYRIGHT: (C)1979,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP430078A JPS5498131A (en) | 1978-01-20 | 1978-01-20 | Input/output control system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP430078A JPS5498131A (en) | 1978-01-20 | 1978-01-20 | Input/output control system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5498131A true JPS5498131A (en) | 1979-08-02 |
Family
ID=11580654
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP430078A Pending JPS5498131A (en) | 1978-01-20 | 1978-01-20 | Input/output control system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5498131A (en) |
-
1978
- 1978-01-20 JP JP430078A patent/JPS5498131A/en active Pending
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS5435645A (en) | Input/output control system for real-time data | |
JPS522121A (en) | Information input system | |
JPS51113427A (en) | Information processing device | |
JPS5498131A (en) | Input/output control system | |
JPS5286023A (en) | Input device | |
JPS5325779A (en) | Speed operating method in numeric control unit | |
JPS57113140A (en) | Generating device for output format | |
JPS53141548A (en) | Data input-output device | |
JPS545636A (en) | Input/output control system for electronic computer | |
JPS54823A (en) | Display control system for ruled line pattern | |
JPS5498130A (en) | Input/output control system | |
JPS5690347A (en) | Generation system of load module | |
JPS5372428A (en) | Data renewal system | |
JPS5443433A (en) | Memory element designation system | |
JPS5389633A (en) | Sending information check processing system | |
JPS5370721A (en) | Magnetic card issuing machine | |
JPS5298879A (en) | Numeric control device having magnetic memory | |
JPS5374856A (en) | Data process system | |
JPS51129127A (en) | Card reader processing device | |
JPS53108750A (en) | Input system for circuit diagram | |
JPS5211834A (en) | Status information system of more than one devices | |
JPS53128912A (en) | Data transmission system | |
JPS51134545A (en) | Information retrieval system | |
JPS5326547A (en) | Register track memory device | |
JPS51114045A (en) | Information processing system |