JPS5496928A - Electronic device - Google Patents

Electronic device

Info

Publication number
JPS5496928A
JPS5496928A JP382178A JP382178A JPS5496928A JP S5496928 A JPS5496928 A JP S5496928A JP 382178 A JP382178 A JP 382178A JP 382178 A JP382178 A JP 382178A JP S5496928 A JPS5496928 A JP S5496928A
Authority
JP
Japan
Prior art keywords
figures
digits
transferred
correct
memory circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP382178A
Other languages
Japanese (ja)
Inventor
Seiji Endo
Yukihiro Nishiguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP382178A priority Critical patent/JPS5496928A/en
Publication of JPS5496928A publication Critical patent/JPS5496928A/en
Pending legal-status Critical Current

Links

Landscapes

  • Calculators And Similar Devices (AREA)
  • Input From Keyboards Or The Like (AREA)
  • Digital Computer Display Output (AREA)

Abstract

PURPOSE: To secure an easy correction for the misinput by providing the display unit to display the symbol group of plural units of figures, characters and others, the key input device to designate an optional symbol group and two sets of registers to memorize the data.
CONSTITUTION: In case figures "123456" are supplied, figures "127856" are supplied mistakenly. To correct these wrong figures, the correct figures "34" are supplied following the misinput. Then the correct input of 7th and 8th digits are transferred to the misinput of 3rd and 4th digits with push of correction keys. With push of the input key, the information is transferred to be memorized in the memory circuit via the encoder. Then the input key is pushed to designate the transfer digit, and then "3" is pushed. Thus, the figure information is put into the memory circuit, and the former memory circuit is subtracted from the latter memory circuit via the subtractor circuit. The contents of the register memorizing the digit contents are transferred in sequence until the subtraction value becomes "0". Thus, the numerical value in the register of 7 digits is transferred to the register of 3 digits, and the correct numerical value is displayed on the display unit.
COPYRIGHT: (C)1979,JPO&Japio
JP382178A 1978-01-17 1978-01-17 Electronic device Pending JPS5496928A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP382178A JPS5496928A (en) 1978-01-17 1978-01-17 Electronic device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP382178A JPS5496928A (en) 1978-01-17 1978-01-17 Electronic device

Publications (1)

Publication Number Publication Date
JPS5496928A true JPS5496928A (en) 1979-07-31

Family

ID=11567850

Family Applications (1)

Application Number Title Priority Date Filing Date
JP382178A Pending JPS5496928A (en) 1978-01-17 1978-01-17 Electronic device

Country Status (1)

Country Link
JP (1) JPS5496928A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0221368A (en) * 1988-07-09 1990-01-24 Isao Kobayashi Block copy design device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0221368A (en) * 1988-07-09 1990-01-24 Isao Kobayashi Block copy design device

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