JPS5488014A - Display unit of reception frequency - Google Patents
Display unit of reception frequencyInfo
- Publication number
- JPS5488014A JPS5488014A JP15588577A JP15588577A JPS5488014A JP S5488014 A JPS5488014 A JP S5488014A JP 15588577 A JP15588577 A JP 15588577A JP 15588577 A JP15588577 A JP 15588577A JP S5488014 A JPS5488014 A JP S5488014A
- Authority
- JP
- Japan
- Prior art keywords
- counter
- binary code
- channel selection
- detected
- reception frequency
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000006243 chemical reaction Methods 0.000 abstract 1
- 238000001514 detection method Methods 0.000 abstract 1
- 230000010355 oscillation Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
Landscapes
- Channel Selection Circuits, Automatic Tuning Circuits (AREA)
- Circuits Of Receivers In General (AREA)
- Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15588577A JPS6049385B2 (ja) | 1977-12-24 | 1977-12-24 | 受信周波数の表示装置 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15588577A JPS6049385B2 (ja) | 1977-12-24 | 1977-12-24 | 受信周波数の表示装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5488014A true JPS5488014A (en) | 1979-07-12 |
| JPS6049385B2 JPS6049385B2 (ja) | 1985-11-01 |
Family
ID=15615622
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15588577A Expired JPS6049385B2 (ja) | 1977-12-24 | 1977-12-24 | 受信周波数の表示装置 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6049385B2 (ja) |
-
1977
- 1977-12-24 JP JP15588577A patent/JPS6049385B2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6049385B2 (ja) | 1985-11-01 |
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