JPS5479063A - Indicating device - Google Patents

Indicating device

Info

Publication number
JPS5479063A
JPS5479063A JP14581077A JP14581077A JPS5479063A JP S5479063 A JPS5479063 A JP S5479063A JP 14581077 A JP14581077 A JP 14581077A JP 14581077 A JP14581077 A JP 14581077A JP S5479063 A JPS5479063 A JP S5479063A
Authority
JP
Japan
Prior art keywords
indicator
peak
amplifier
indication
levels
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14581077A
Other languages
Japanese (ja)
Inventor
Takeharu Niioka
Isao Kobayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP14581077A priority Critical patent/JPS5479063A/en
Publication of JPS5479063A publication Critical patent/JPS5479063A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To perform monitor level adjustment always accurately and evenly with a simple constitution and facilitate circuit integration of the indicating device by changing over indicator indication levels according to the count values of peak levels.
CONSTITUTION: The recording current of a tape recorder through a buffer amplifier A, absolute value amplifier B and operational amplifier 15 causes the transistors Q1, Q2... of an indicator E conduct subsequently, then light emitting diodes D11, D12... light and the indicator E makes indication of VU levels, etc. On the other hand, the peak outputs of the amplifier 15 are detected with an operational amplifier 18 and the differentiation outputs by a capacitor C2, resistance R30 are counted by counter 27 for the specified time by a multi G and counter 25. An FET 21 which forms a switch circuit is conducted by the comparison output of a comparator 23 in which said count values become above a set value, and the indicator E is changed over to peak value indication by the low amplification integrated value corresponding to the peak values through a capacitor C1 and resistance R11.
COPYRIGHT: (C)1979,JPO&Japio
JP14581077A 1977-12-05 1977-12-05 Indicating device Pending JPS5479063A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14581077A JPS5479063A (en) 1977-12-05 1977-12-05 Indicating device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14581077A JPS5479063A (en) 1977-12-05 1977-12-05 Indicating device

Publications (1)

Publication Number Publication Date
JPS5479063A true JPS5479063A (en) 1979-06-23

Family

ID=15393653

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14581077A Pending JPS5479063A (en) 1977-12-05 1977-12-05 Indicating device

Country Status (1)

Country Link
JP (1) JPS5479063A (en)

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