JPS5457944A - Modulator and demodulator - Google Patents

Modulator and demodulator

Info

Publication number
JPS5457944A
JPS5457944A JP12487477A JP12487477A JPS5457944A JP S5457944 A JPS5457944 A JP S5457944A JP 12487477 A JP12487477 A JP 12487477A JP 12487477 A JP12487477 A JP 12487477A JP S5457944 A JPS5457944 A JP S5457944A
Authority
JP
Japan
Prior art keywords
circuit
input
modulation
buffer
case
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12487477A
Other languages
Japanese (ja)
Other versions
JPS6112403B2 (en
Inventor
Harumitsu Shimizu
Yutaka Suzuki
Meiki Yahata
Shunsuke Yoda
Tadamichi Kawasaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Nippon Telegraph and Telephone Corp
Original Assignee
Toshiba Corp
Nippon Telegraph and Telephone Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Nippon Telegraph and Telephone Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP12487477A priority Critical patent/JPS5457944A/en
Publication of JPS5457944A publication Critical patent/JPS5457944A/en
Publication of JPS6112403B2 publication Critical patent/JPS6112403B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Amplitude Modulation (AREA)

Abstract

PURPOSE: To obtain a MODEM equipped with the modulation and demodulation functions of AM and FM by adding a few of logical operation circuits to a digital PLL circuit.
CONSTITUTION: Input buffer 35, output buffer 36 and gate circuits 37 and 38 are added to the digital PLL circuit constituted by multiplication circuit 31, digital LPF 32, phase disignation circuit 33 and sine wave generator 34. Then, buffer 35 supplies inputs I and II in time division when circuit 31 operates as a phase comparator and a synchronization detector, and depends upon command "sinout" when a fixed pattern replaces the input. In case of the demodulation of AM and FM, the output of LPF 32 becomes the input of circuit 33; and in case of FM modulation, the input becomes the input of circuit 33 as it is; and in case of AM modulation, the input of circuit 33 is so controlled that it may become "0" by circuit 33. Circuit 37 controls so that the output of LPF 32 may be supplied to buffer 36 in case of FM demodulation and the output of circuit 31 may be supplied to beffer 36 in other cases, so that modulation and demodulation functions of AM and FM are united into one
COPYRIGHT: (C)1979,JPO&Japio
JP12487477A 1977-10-18 1977-10-18 Modulator and demodulator Granted JPS5457944A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12487477A JPS5457944A (en) 1977-10-18 1977-10-18 Modulator and demodulator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12487477A JPS5457944A (en) 1977-10-18 1977-10-18 Modulator and demodulator

Publications (2)

Publication Number Publication Date
JPS5457944A true JPS5457944A (en) 1979-05-10
JPS6112403B2 JPS6112403B2 (en) 1986-04-08

Family

ID=14896224

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12487477A Granted JPS5457944A (en) 1977-10-18 1977-10-18 Modulator and demodulator

Country Status (1)

Country Link
JP (1) JPS5457944A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5787212A (en) * 1980-11-17 1982-05-31 Mitsubishi Electric Corp Fm modulator and demodulator
JPS5831602A (en) * 1981-08-20 1983-02-24 Nec Corp Modulation and demodulation circuit
JPS5868305A (en) * 1981-10-19 1983-04-23 Hitachi Ltd Frequency modulating and demodulating circuit

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5787212A (en) * 1980-11-17 1982-05-31 Mitsubishi Electric Corp Fm modulator and demodulator
JPS5831602A (en) * 1981-08-20 1983-02-24 Nec Corp Modulation and demodulation circuit
JPS5868305A (en) * 1981-10-19 1983-04-23 Hitachi Ltd Frequency modulating and demodulating circuit
JPH0212047B2 (en) * 1981-10-19 1990-03-16 Hitachi Ltd

Also Published As

Publication number Publication date
JPS6112403B2 (en) 1986-04-08

Similar Documents

Publication Publication Date Title
GB2017436A (en) A circuit for recovering the carrier of an amplitude modulated synchronous digital signal
JPS5534851A (en) Phase detector
JPS57171845A (en) Phase locked loop circuit
JPS57125528A (en) Frequency synthesizer
JPS5360150A (en) Instantaneous leading-in system for digital phase lock loop
JPS5457944A (en) Modulator and demodulator
JPS5368827A (en) Control device of pulse width modulation inverter
JPS5299054A (en) Phase locked loop circuit
JPS53119653A (en) Synchronizing demodulator
JPS5389354A (en) Digital synchronous detector
JPS5275917A (en) Phase control circuit
JPS5580949A (en) Carrier wave regenerating circuit
JPS5255360A (en) Phase fixing loop synthesizer
JPS5364570A (en) Phase comparator
JPS5384670A (en) Demodulating system for multilevel carrier digital signal
FR2441174A1 (en) Digital phase comparator for phase locked loop - comprises additional bistables suppressing output when input is missing
JPS5346255A (en) Pll circuit
JPS531448A (en) Carrier detector
JPS53103363A (en) Digital phase synchronous loop
JPS5213757A (en) Sine wave signal generator circuit
JPS51144557A (en) Frequency discrimination circuit
JPS5255461A (en) Tank circuit
Shishkin Digital Phase-Shift Automatic Frequency Control System
JPS52121301A (en) Phase locked loop for multichannel recored demodulation
JPS5335929A (en) Digital phase controlling circuit for n phase rectifing circuit