JPS5451339A - Bit-phase synchronous circuit - Google Patents

Bit-phase synchronous circuit

Info

Publication number
JPS5451339A
JPS5451339A JP11662277A JP11662277A JPS5451339A JP S5451339 A JPS5451339 A JP S5451339A JP 11662277 A JP11662277 A JP 11662277A JP 11662277 A JP11662277 A JP 11662277A JP S5451339 A JPS5451339 A JP S5451339A
Authority
JP
Japan
Prior art keywords
bit
signal
time slot
phase synchronous
synchronous circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11662277A
Other languages
Japanese (ja)
Inventor
Haruo Tsuda
Toshio Iyota
Hidetoshi Shirakawa
Moriyuki Yamamoto
Susumu Tanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Original Assignee
Fujitsu Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, NEC Corp, Nippon Telegraph and Telephone Corp, Nippon Electric Co Ltd filed Critical Fujitsu Ltd
Priority to JP11662277A priority Critical patent/JPS5451339A/en
Publication of JPS5451339A publication Critical patent/JPS5451339A/en
Pending legal-status Critical Current

Links

Landscapes

  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE: To establish the bit-phase synchronism of the transfer of digital signal among several devices by timing signals from one reference timing signal generating source.
CONSTITUTION: Three discriminative signals, obtained from reference timing signal S1, are compared with signal S2 by AND gates 18, 19 and 20 in order to discriminate which time slot the state change of input digital signal S2 belongs to. Then, discrimination circuit 15 obtains output S7 indicating the time slot region, and output S10 is applied to the digital processing circuit, thereby establishing the fixed phase synchronism
COPYRIGHT: (C)1979,JPO&Japio
JP11662277A 1977-09-30 1977-09-30 Bit-phase synchronous circuit Pending JPS5451339A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11662277A JPS5451339A (en) 1977-09-30 1977-09-30 Bit-phase synchronous circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11662277A JPS5451339A (en) 1977-09-30 1977-09-30 Bit-phase synchronous circuit

Publications (1)

Publication Number Publication Date
JPS5451339A true JPS5451339A (en) 1979-04-23

Family

ID=14691737

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11662277A Pending JPS5451339A (en) 1977-09-30 1977-09-30 Bit-phase synchronous circuit

Country Status (1)

Country Link
JP (1) JPS5451339A (en)

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