JPS5435669A - Dc deviation correction method of multi-stage analog digital conversion unit - Google Patents

Dc deviation correction method of multi-stage analog digital conversion unit

Info

Publication number
JPS5435669A
JPS5435669A JP10104777A JP10104777A JPS5435669A JP S5435669 A JPS5435669 A JP S5435669A JP 10104777 A JP10104777 A JP 10104777A JP 10104777 A JP10104777 A JP 10104777A JP S5435669 A JPS5435669 A JP S5435669A
Authority
JP
Japan
Prior art keywords
conversion unit
digital conversion
analog digital
correction method
deviation correction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10104777A
Other languages
Japanese (ja)
Other versions
JPS6015172B2 (en
Inventor
Yuichi Ninomiya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Japan Broadcasting Corp
Original Assignee
Nippon Hoso Kyokai NHK
Japan Broadcasting Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Hoso Kyokai NHK, Japan Broadcasting Corp filed Critical Nippon Hoso Kyokai NHK
Priority to JP10104777A priority Critical patent/JPS6015172B2/en
Publication of JPS5435669A publication Critical patent/JPS5435669A/en
Publication of JPS6015172B2 publication Critical patent/JPS6015172B2/en
Expired legal-status Critical Current

Links

Abstract

PURPOSE: To automatically correct in the lump the DC deviation which might be caused, by the relatively simple circuit configuration, by inserting the DC level shift circuit into the analog circuit of the multi-stage analog digital conversion unit, and controlling the foregoing.
COPYRIGHT: (C)1979,JPO&Japio
JP10104777A 1977-08-25 1977-08-25 DC deviation correction method for multi-stage analog-to-digital converter Expired JPS6015172B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10104777A JPS6015172B2 (en) 1977-08-25 1977-08-25 DC deviation correction method for multi-stage analog-to-digital converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10104777A JPS6015172B2 (en) 1977-08-25 1977-08-25 DC deviation correction method for multi-stage analog-to-digital converter

Publications (2)

Publication Number Publication Date
JPS5435669A true JPS5435669A (en) 1979-03-15
JPS6015172B2 JPS6015172B2 (en) 1985-04-18

Family

ID=14290204

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10104777A Expired JPS6015172B2 (en) 1977-08-25 1977-08-25 DC deviation correction method for multi-stage analog-to-digital converter

Country Status (1)

Country Link
JP (1) JPS6015172B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60181886U (en) * 1984-05-14 1985-12-03 株式会社日立ホームテック Terminal structure of sheathed heater
JPH0418815A (en) * 1990-05-14 1992-01-23 Nec Corp Serial/parallel-type analog/digital converter and its driving method
JPH08181610A (en) * 1994-12-22 1996-07-12 Advantest Corp High speed high accuracy a/d converter

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60181886U (en) * 1984-05-14 1985-12-03 株式会社日立ホームテック Terminal structure of sheathed heater
JPH0418815A (en) * 1990-05-14 1992-01-23 Nec Corp Serial/parallel-type analog/digital converter and its driving method
JPH08181610A (en) * 1994-12-22 1996-07-12 Advantest Corp High speed high accuracy a/d converter

Also Published As

Publication number Publication date
JPS6015172B2 (en) 1985-04-18

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