JPS5426472A - Method of manufacturing multiilayer printed wiring board - Google Patents

Method of manufacturing multiilayer printed wiring board

Info

Publication number
JPS5426472A
JPS5426472A JP9266877A JP9266877A JPS5426472A JP S5426472 A JPS5426472 A JP S5426472A JP 9266877 A JP9266877 A JP 9266877A JP 9266877 A JP9266877 A JP 9266877A JP S5426472 A JPS5426472 A JP S5426472A
Authority
JP
Japan
Prior art keywords
manufacturing
wiring board
printed wiring
multiilayer
multiilayer printed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9266877A
Other languages
English (en)
Inventor
Shinichi Tamura
Tomiyoshi Itagaki
Tetsuo Kunitomi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP9266877A priority Critical patent/JPS5426472A/ja
Publication of JPS5426472A publication Critical patent/JPS5426472A/ja
Pending legal-status Critical Current

Links

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
JP9266877A 1977-07-30 1977-07-30 Method of manufacturing multiilayer printed wiring board Pending JPS5426472A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9266877A JPS5426472A (en) 1977-07-30 1977-07-30 Method of manufacturing multiilayer printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9266877A JPS5426472A (en) 1977-07-30 1977-07-30 Method of manufacturing multiilayer printed wiring board

Publications (1)

Publication Number Publication Date
JPS5426472A true JPS5426472A (en) 1979-02-28

Family

ID=14060846

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9266877A Pending JPS5426472A (en) 1977-07-30 1977-07-30 Method of manufacturing multiilayer printed wiring board

Country Status (1)

Country Link
JP (1) JPS5426472A (ja)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5839099A (ja) * 1981-08-31 1983-03-07 シャープ株式会社 多層印刷回路基板の製造方法
JPS5939096A (ja) * 1982-08-27 1984-03-03 松下電器産業株式会社 多層印刷配線板の製造方法
WO2004084593A1 (ja) * 1999-07-02 2004-09-30 Katsunori Kokubun 回路基板の微細スルーホール導通部の形成法

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5839099A (ja) * 1981-08-31 1983-03-07 シャープ株式会社 多層印刷回路基板の製造方法
JPS6347158B2 (ja) * 1981-08-31 1988-09-20 Sharp Kk
JPS5939096A (ja) * 1982-08-27 1984-03-03 松下電器産業株式会社 多層印刷配線板の製造方法
WO2004084593A1 (ja) * 1999-07-02 2004-09-30 Katsunori Kokubun 回路基板の微細スルーホール導通部の形成法

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