JPS54154233A - Inter-processor coupling device - Google Patents

Inter-processor coupling device

Info

Publication number
JPS54154233A
JPS54154233A JP6293878A JP6293878A JPS54154233A JP S54154233 A JPS54154233 A JP S54154233A JP 6293878 A JP6293878 A JP 6293878A JP 6293878 A JP6293878 A JP 6293878A JP S54154233 A JPS54154233 A JP S54154233A
Authority
JP
Japan
Prior art keywords
interface
inter
control
processor coupling
processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6293878A
Other languages
Japanese (ja)
Other versions
JPS588006B2 (en
Inventor
Yuichi Narita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP6293878A priority Critical patent/JPS588006B2/en
Publication of JPS54154233A publication Critical patent/JPS54154233A/en
Publication of JPS588006B2 publication Critical patent/JPS588006B2/en
Expired legal-status Critical Current

Links

Abstract

PURPOSE: To ensure the connection between the systems of the same interface as well as the systems of different interfaces through combinations of the packages to be mounted on the same device, and thus to enable the structure of the folded route for the inter-processor coupling device as well as the system switching.
CONSTITUTION: I/O interface part 2-A and 2-B which perform the pair processes of different types are provided along with control part 1 to carry out the common control to the inter-processor coupling devices which are connected between plural units of processors. Driver circuit 22 and receiver circuit 21 for the pair processor interface signal are installed to part 2-A and 2-B of such constitution. Then I/O interface control circuit 10 to give the common control to the signals on the interface plus FF11 to select one unit of part 2-A and 2-B each are provided to control part 1. And part 2-A and 2-B are formed detachable to enable mounting of an optional one or plural units of part 2-A and 2-B each.
COPYRIGHT: (C)1979,JPO&Japio
JP6293878A 1978-05-26 1978-05-26 Inter-processing unit coupling device Expired JPS588006B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6293878A JPS588006B2 (en) 1978-05-26 1978-05-26 Inter-processing unit coupling device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6293878A JPS588006B2 (en) 1978-05-26 1978-05-26 Inter-processing unit coupling device

Publications (2)

Publication Number Publication Date
JPS54154233A true JPS54154233A (en) 1979-12-05
JPS588006B2 JPS588006B2 (en) 1983-02-14

Family

ID=13214732

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6293878A Expired JPS588006B2 (en) 1978-05-26 1978-05-26 Inter-processing unit coupling device

Country Status (1)

Country Link
JP (1) JPS588006B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6230445U (en) * 1985-08-07 1987-02-24
WO1991016676A1 (en) * 1990-04-17 1991-10-31 Seiko Epson Corporation Personal computer

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6230445U (en) * 1985-08-07 1987-02-24
WO1991016676A1 (en) * 1990-04-17 1991-10-31 Seiko Epson Corporation Personal computer

Also Published As

Publication number Publication date
JPS588006B2 (en) 1983-02-14

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