JPS5415396B2 - - Google Patents

Info

Publication number
JPS5415396B2
JPS5415396B2 JP14879774A JP14879774A JPS5415396B2 JP S5415396 B2 JPS5415396 B2 JP S5415396B2 JP 14879774 A JP14879774 A JP 14879774A JP 14879774 A JP14879774 A JP 14879774A JP S5415396 B2 JPS5415396 B2 JP S5415396B2
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP14879774A
Other languages
Japanese (ja)
Other versions
JPS5176987A (cg-RX-API-DMAC7.html
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP14879774A priority Critical patent/JPS5415396B2/ja
Priority to US05/644,294 priority patent/US4058419A/en
Priority to DE2558925A priority patent/DE2558925C2/de
Priority to FR7539998A priority patent/FR2334204A1/fr
Priority to DE2560576A priority patent/DE2560576C2/de
Priority to GB53012/75A priority patent/GB1528027A/en
Publication of JPS5176987A publication Critical patent/JPS5176987A/ja
Priority to US05/822,194 priority patent/US4153487A/en
Priority to US05/822,322 priority patent/US4151019A/en
Publication of JPS5415396B2 publication Critical patent/JPS5415396B2/ja
Expired legal-status Critical Current

Links

Landscapes

  • Bipolar Transistors (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Logic Circuits (AREA)
JP14879774A 1974-12-27 1974-12-27 Expired JPS5415396B2 (cg-RX-API-DMAC7.html)

Priority Applications (8)

Application Number Priority Date Filing Date Title
JP14879774A JPS5415396B2 (cg-RX-API-DMAC7.html) 1974-12-27 1974-12-27
US05/644,294 US4058419A (en) 1974-12-27 1975-12-24 Method of manufacturing integrated injection logic semiconductor devices utilizing self-aligned double-diffusion techniques
DE2558925A DE2558925C2 (de) 1974-12-27 1975-12-29 Verfahren zur Herstellung einer integrierten Injektions-Schaltungsanordnung
FR7539998A FR2334204A1 (fr) 1974-12-27 1975-12-29 Procede de fabrication d'un dispositif semi-conducteur en logique a injection integree
DE2560576A DE2560576C2 (de) 1974-12-27 1975-12-29 Verfahren zum Herstellen einer integrierten Injektions-Schaltungsanordnung
GB53012/75A GB1528027A (en) 1974-12-27 1975-12-29 Method of manufacturing integrated injection logic semiconductor devices
US05/822,194 US4153487A (en) 1974-12-27 1977-08-05 Method of manufacturing intergrated injection logic semiconductor devices utilizing self-aligned double-diffusion techniques
US05/822,322 US4151019A (en) 1974-12-27 1977-08-05 Method of manufacturing integrated injection logic semiconductor devices utilizing self-aligned double-diffusion techniques

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14879774A JPS5415396B2 (cg-RX-API-DMAC7.html) 1974-12-27 1974-12-27

Publications (2)

Publication Number Publication Date
JPS5176987A JPS5176987A (cg-RX-API-DMAC7.html) 1976-07-03
JPS5415396B2 true JPS5415396B2 (cg-RX-API-DMAC7.html) 1979-06-14

Family

ID=15460907

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14879774A Expired JPS5415396B2 (cg-RX-API-DMAC7.html) 1974-12-27 1974-12-27

Country Status (1)

Country Link
JP (1) JPS5415396B2 (cg-RX-API-DMAC7.html)

Also Published As

Publication number Publication date
JPS5176987A (cg-RX-API-DMAC7.html) 1976-07-03

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