JPS54148345A - Electronic computer - Google Patents

Electronic computer

Info

Publication number
JPS54148345A
JPS54148345A JP5689978A JP5689978A JPS54148345A JP S54148345 A JPS54148345 A JP S54148345A JP 5689978 A JP5689978 A JP 5689978A JP 5689978 A JP5689978 A JP 5689978A JP S54148345 A JPS54148345 A JP S54148345A
Authority
JP
Japan
Prior art keywords
key
memory
unit
display
order
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5689978A
Other languages
Japanese (ja)
Inventor
Masuaki Morino
Yoshiyuki Fujikawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP5689978A priority Critical patent/JPS54148345A/en
Publication of JPS54148345A publication Critical patent/JPS54148345A/en
Pending legal-status Critical Current

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  • Calculators And Similar Devices (AREA)
  • Document Processing Apparatus (AREA)

Abstract

PURPOSE: To increase greatly the efficiency of the editing work for the input contents given to the memory by giving the display of the special symbols of the address along with the order before and afrer the symbol display when the insertion designation order is carried out.
CONSTITUTION: With supply of the key signal of key unit 1, the signal is written into the memory position decided by address register 6 of memory 4. And the contents is displayed at display unit 15. Now, if the operation of the adder key "+" is forgotten for the input numerical formula and the next figure or character is displayed at the position of the adder key, the step-up key is operated to secure the sequential right shifting for the designation step in the line. And accordingly, the flashing points of unit 15 have the sequential right shifting. With operation of the insertion key at the prescribed position, the operation is given to set up the blank equivalent to one order at the insertion designation position of memory 4 by the control of control circuit part 10. And the numerical formula displaying the special symbol is shown at the position of the insertion designation in unit 15. Then addition order key "+" is operated to secure the display of the wright numerical formula displaying "+" at that position.
COPYRIGHT: (C)1979,JPO&Japio
JP5689978A 1978-05-13 1978-05-13 Electronic computer Pending JPS54148345A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5689978A JPS54148345A (en) 1978-05-13 1978-05-13 Electronic computer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5689978A JPS54148345A (en) 1978-05-13 1978-05-13 Electronic computer

Publications (1)

Publication Number Publication Date
JPS54148345A true JPS54148345A (en) 1979-11-20

Family

ID=13040288

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5689978A Pending JPS54148345A (en) 1978-05-13 1978-05-13 Electronic computer

Country Status (1)

Country Link
JP (1) JPS54148345A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5763025U (en) * 1980-09-29 1982-04-14
JPS63109562A (en) * 1986-10-27 1988-05-14 Yokogawa Hewlett Packard Ltd Data processor

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5763025U (en) * 1980-09-29 1982-04-14
JPS6114992Y2 (en) * 1980-09-29 1986-05-10
JPS63109562A (en) * 1986-10-27 1988-05-14 Yokogawa Hewlett Packard Ltd Data processor

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