JPS54143275A - Frequency discriminator - Google Patents

Frequency discriminator

Info

Publication number
JPS54143275A
JPS54143275A JP5141478A JP5141478A JPS54143275A JP S54143275 A JPS54143275 A JP S54143275A JP 5141478 A JP5141478 A JP 5141478A JP 5141478 A JP5141478 A JP 5141478A JP S54143275 A JPS54143275 A JP S54143275A
Authority
JP
Japan
Prior art keywords
signals
output terminals
phase difference
input
detector
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5141478A
Other languages
Japanese (ja)
Inventor
Masami Tajima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP5141478A priority Critical patent/JPS54143275A/en
Publication of JPS54143275A publication Critical patent/JPS54143275A/en
Pending legal-status Critical Current

Links

Landscapes

  • Measuring Phase Differences (AREA)

Abstract

PURPOSE: To realize direct reading of frequency of input signals, by supplying input signals having phase difference into a phase detector and processing the output signals thereof, in a radar system or the like.
CONSTITUTION: An input signal is distributed 2, and supplied into a phase detector 3 and a delay line 4. And two signals having a phase difference are inputted into the detector 3, then at output terminals 5, 6 thereof are obtained signals having a phase difference of π/2. These signals are supplied into differential amplifiers 8 to 12 of a signal combining part 7, and logic signals A to D are obtained at output terminals 13 to 16 thereof. By processing the signals A to D in an arithmetic unit 17 consisting of an inverter IN and AND element K, signals of levels representing the frequencies of the input signals are obtained in output terminals 18 to 21 thereof.
COPYRIGHT: (C)1979,JPO&Japio
JP5141478A 1978-04-28 1978-04-28 Frequency discriminator Pending JPS54143275A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5141478A JPS54143275A (en) 1978-04-28 1978-04-28 Frequency discriminator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5141478A JPS54143275A (en) 1978-04-28 1978-04-28 Frequency discriminator

Publications (1)

Publication Number Publication Date
JPS54143275A true JPS54143275A (en) 1979-11-08

Family

ID=12886259

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5141478A Pending JPS54143275A (en) 1978-04-28 1978-04-28 Frequency discriminator

Country Status (1)

Country Link
JP (1) JPS54143275A (en)

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