JPS5543987A - Phase comparator - Google Patents

Phase comparator

Info

Publication number
JPS5543987A
JPS5543987A JP11732278A JP11732278A JPS5543987A JP S5543987 A JPS5543987 A JP S5543987A JP 11732278 A JP11732278 A JP 11732278A JP 11732278 A JP11732278 A JP 11732278A JP S5543987 A JPS5543987 A JP S5543987A
Authority
JP
Japan
Prior art keywords
circuit
flip
phase
signal
flop circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11732278A
Other languages
Japanese (ja)
Inventor
Makoto Akiyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP11732278A priority Critical patent/JPS5543987A/en
Publication of JPS5543987A publication Critical patent/JPS5543987A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To obtain a comparator the phase synchronizing area of which is not overwide, by which the phase synchronizing point can freely be set, and which is effective for the phase control motor, by combining a flip-flop circuit, exclusive OR circut and AND circuit.
CONSTITUTION: The differential circuit 9 gives a signal to the flip-flop circuit 10 for setting it in a rise time of the signal fs the phase of which is to be comparated, the other differential circuit 8 does a signal to the flip-flop circuit for resetting it in a fall time of the reference frequency signal fr. The reference frequency signal fr and output Q of the flip-flop circuit are fed to one of the AND circuits 13, 14 through the exclusive OR circuit 11, the reference frequency signal fr and the one through the inverter 12 are fed to the other of AND circuits 13, 14, signals depending on a lag and lead of phase between the signals fr and fs are provided.
COPYRIGHT: (C)1980,JPO&Japio
JP11732278A 1978-09-21 1978-09-21 Phase comparator Pending JPS5543987A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11732278A JPS5543987A (en) 1978-09-21 1978-09-21 Phase comparator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11732278A JPS5543987A (en) 1978-09-21 1978-09-21 Phase comparator

Publications (1)

Publication Number Publication Date
JPS5543987A true JPS5543987A (en) 1980-03-28

Family

ID=14708867

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11732278A Pending JPS5543987A (en) 1978-09-21 1978-09-21 Phase comparator

Country Status (1)

Country Link
JP (1) JPS5543987A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04500891A (en) * 1988-09-26 1992-02-13 モトローラ・インコーポレイテッド Sample-hold phase detector and its control method

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5323256A (en) * 1976-08-16 1978-03-03 Hitachi Ltd Phase lock loop

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5323256A (en) * 1976-08-16 1978-03-03 Hitachi Ltd Phase lock loop

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04500891A (en) * 1988-09-26 1992-02-13 モトローラ・インコーポレイテッド Sample-hold phase detector and its control method

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