JPS54140885A - I2l semiconductor device - Google Patents
I2l semiconductor deviceInfo
- Publication number
- JPS54140885A JPS54140885A JP2881979A JP2881979A JPS54140885A JP S54140885 A JPS54140885 A JP S54140885A JP 2881979 A JP2881979 A JP 2881979A JP 2881979 A JP2881979 A JP 2881979A JP S54140885 A JPS54140885 A JP S54140885A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/411—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only
- G11C11/4113—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only with at least one cell access to base or collector of at least one of said transistors, e.g. via access diodes, access transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/761—PN junctions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0214—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
- H01L27/0229—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of bipolar structures
- H01L27/0233—Integrated injection logic structures [I2L]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/082—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including bipolar components only
- H01L27/0821—Combination of lateral and vertical transistors only
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/26—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback
- H03K3/28—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback
- H03K3/281—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator
- H03K3/286—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable
- H03K3/288—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable using additional transistors in the input circuit
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Bipolar Integrated Circuits (AREA)
- Bipolar Transistors (AREA)
- Logic Circuits (AREA)
- Semiconductor Memories (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE2816949A DE2816949C3 (de) | 1978-04-19 | 1978-04-19 | Monolithisch integrierte Halbleiteranordnung und deren Verwendung zum Aufbau einer Speicheranordnung |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS54140885A true JPS54140885A (en) | 1979-11-01 |
JPS5643616B2 JPS5643616B2 (US07709020-20100504-C00041.png) | 1981-10-14 |
Family
ID=6037382
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2881979A Granted JPS54140885A (en) | 1978-04-19 | 1979-03-14 | I2l semiconductor device |
Country Status (4)
Country | Link |
---|---|
US (1) | US4259730A (US07709020-20100504-C00041.png) |
EP (1) | EP0004871B1 (US07709020-20100504-C00041.png) |
JP (1) | JPS54140885A (US07709020-20100504-C00041.png) |
DE (2) | DE2816949C3 (US07709020-20100504-C00041.png) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2855866C3 (de) * | 1978-12-22 | 1981-10-29 | Ibm Deutschland Gmbh, 7000 Stuttgart | Verfahren und Schaltungsanordnung zum Betreiben eines integrierten Halbleiterspeichers |
DE2926050C2 (de) * | 1979-06-28 | 1981-10-01 | Ibm Deutschland Gmbh, 7000 Stuttgart | Verfahren und Schaltungsanordnung zum Lesen Und/oder Schreiben eines integrierten Halbleiterspeichers mit Speicherzellen in MTL-Technik |
DE2944141A1 (de) * | 1979-11-02 | 1981-05-14 | Ibm Deutschland Gmbh, 7000 Stuttgart | Monolithisch integrierte speicheranordnung |
DE2951945A1 (de) * | 1979-12-22 | 1981-07-02 | Ibm Deutschland Gmbh, 7000 Stuttgart | Schaltungsanordnung zur kapazitiven lesesignalverstaerkung in einem integrierten halbleiterspeicher mit einem intergrierten halbleiterspeicher mit speicherzellen in mtl-technik |
JPS5848521U (ja) * | 1981-09-30 | 1983-04-01 | 三井・デュポン ポリケミカル株式会社 | 自動車用合成樹脂製窓枠モ−ルデイング |
JPS5848522U (ja) * | 1981-09-30 | 1983-04-01 | 三井・デュポン ポリケミカル株式会社 | 合成樹脂製の自動車窓枠モ−ルデイング |
DE3173744D1 (en) * | 1981-10-30 | 1986-03-20 | Ibm Deutschland | Method for reading a semiconductor memory |
JPS6449417U (US07709020-20100504-C00041.png) * | 1987-09-22 | 1989-03-27 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
NL7107040A (US07709020-20100504-C00041.png) * | 1971-05-22 | 1972-11-24 | ||
US4021786A (en) * | 1975-10-30 | 1977-05-03 | Fairchild Camera And Instrument Corporation | Memory cell circuit and semiconductor structure therefore |
DE2612666C2 (de) * | 1976-03-25 | 1982-11-18 | Ibm Deutschland Gmbh, 7000 Stuttgart | Integrierte, invertierende logische Schaltung |
US4137109A (en) * | 1976-04-12 | 1979-01-30 | Texas Instruments Incorporated | Selective diffusion and etching method for isolation of integrated logic circuit |
NL7700420A (nl) * | 1977-01-17 | 1978-07-19 | Philips Nv | Halfgeleiderinrichting en werkwijze ter ver- vaardiging daarvan. |
US4112511A (en) * | 1977-09-13 | 1978-09-05 | Signetics Corporation | Four transistor static bipolar memory cell using merged transistors |
-
1978
- 1978-04-19 DE DE2816949A patent/DE2816949C3/de not_active Expired
-
1979
- 1979-03-14 JP JP2881979A patent/JPS54140885A/ja active Granted
- 1979-03-16 EP EP79100816A patent/EP0004871B1/de not_active Expired
- 1979-03-16 DE DE7979100816T patent/DE2960919D1/de not_active Expired
- 1979-04-05 US US06/027,223 patent/US4259730A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0004871A1 (de) | 1979-10-31 |
JPS5643616B2 (US07709020-20100504-C00041.png) | 1981-10-14 |
DE2816949A1 (de) | 1979-10-25 |
DE2816949B2 (de) | 1980-11-20 |
EP0004871B1 (de) | 1981-10-07 |
US4259730A (en) | 1981-03-31 |
DE2816949C3 (de) | 1981-07-16 |
DE2960919D1 (en) | 1981-12-17 |
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