JPS54139709A - Reproducer of digital signals - Google Patents

Abstract

PURPOSE: To editing to be performed through cutting of PCM recording tape by jumping the wrong data detected and reading out the next data by the use of a data error detecting circuit and a memory circuit.

CONSTITUTION: Normal reproduction digital input signals are subsequently memorized in a memory circuit 1 based on the first clock signal 3 by a write address assigning circuit 2 and are delayed and subsequently read out by a read-out address assigning circuit 4. Now, when a wrong data is inputted, it is memorized in the memory 1 and is at the same time detected in a detecting circuit 6. A control circuit 8 then commands the circuit 4 to jump the wrong data and read out the next normal data. At the same time, the first clock signal 3 is changed over to the second clock signal 9 of a frequency slightly lower than that of the first clock signal 3. Thereby, the reduction in the capacity of the circuit 1 is prevented, and when the read-out address arrives at the final address, the clock signal is again reset to the first clock signal. Since the normal data are continuously outputted without outputting the wrong data in this way, the intended object may be achieved.

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