JPS54138334A - Frequency control circuit - Google Patents

Frequency control circuit

Info

Publication number
JPS54138334A
JPS54138334A JP4693378A JP4693378A JPS54138334A JP S54138334 A JPS54138334 A JP S54138334A JP 4693378 A JP4693378 A JP 4693378A JP 4693378 A JP4693378 A JP 4693378A JP S54138334 A JPS54138334 A JP S54138334A
Authority
JP
Japan
Prior art keywords
frequency
signal
output
demultiplier
phase
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4693378A
Other languages
Japanese (ja)
Inventor
Shinji Kaneko
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP4693378A priority Critical patent/JPS54138334A/en
Publication of JPS54138334A publication Critical patent/JPS54138334A/en
Pending legal-status Critical Current

Links

Landscapes

  • Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)

Abstract

PURPOSE: To obtain the signal without phase shift, by adjusting the phase of the output signal of the frequency demultiplier which obtains the frequency corresponding to the chroma subcarrier frequency with the output of the frequency demultiplier obtaining the frequency of 1/n.
CONSTITUTION: When the reproduced horizontal synchronizing signal is missing from the two rotary magnetic heads, discrimination signal is obtained from the terminal 8a of the phase discrimination circuit 8, it is inputted to the frequency demultiplier 2 via the OR circuir 9, and the counter is reset. In this case, no signal is obtained at the terminal 8b and no signal is fed to the sampling hold circuit 11 of the phase comparator 3. Accordingly, the output not affected to the phase shift is obtained from the frequency demultiplier 2. Consequently, from the variable frequency oscillator 1, the signal n times the frequency approximately equal to the horizontal synchronizing frequency is obtained. Further, the output of the frequency demultiplier 2 dividing the frequency of the oscillator 1 by 1/n, is fed to the frequency demultiplier 5 dividing the output of the frequency demultiplier 2 by 1/m. Thus, the switch circuit 13 is turned on once at the m horizontal period to regulate the phase of the output signal of the frequency demultiplier 4 dividing the output of the oscillator 1 by 1/m.
COPYRIGHT: (C)1979,JPO&Japio
JP4693378A 1978-04-20 1978-04-20 Frequency control circuit Pending JPS54138334A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4693378A JPS54138334A (en) 1978-04-20 1978-04-20 Frequency control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4693378A JPS54138334A (en) 1978-04-20 1978-04-20 Frequency control circuit

Publications (1)

Publication Number Publication Date
JPS54138334A true JPS54138334A (en) 1979-10-26

Family

ID=12761112

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4693378A Pending JPS54138334A (en) 1978-04-20 1978-04-20 Frequency control circuit

Country Status (1)

Country Link
JP (1) JPS54138334A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5720084A (en) * 1980-07-11 1982-02-02 Matsushita Electric Ind Co Ltd Magnetic video recording and reproducing device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5720084A (en) * 1980-07-11 1982-02-02 Matsushita Electric Ind Co Ltd Magnetic video recording and reproducing device
JPH0140555B2 (en) * 1980-07-11 1989-08-29 Matsushita Electric Ind Co Ltd

Similar Documents

Publication Publication Date Title
JPS5558681A (en) Time base error correcting circuit of video signal
JPS5457829A (en) Processing circuit for color video signal
JPS5498523A (en) Synchronizer between reproduced video signal from video disc and other video signals
JPS54138334A (en) Frequency control circuit
JPS52138824A (en) Color picture signal recorder
JPS52153333A (en) Color tv unit
JPS5330822A (en) Time-base correction equipment
JPS538518A (en) Tv picture receiver of index system
JPS5523696A (en) Phase shift circuit
JPS5253624A (en) Jitter correction unit
JPS5377133A (en) Special effect generator
JPS5336425A (en) Color television picture receiver of beam index time
JPS5538719A (en) Vtr
JPS5275219A (en) Automatic frequency control circuit
JPS5213725A (en) Stationary picture image receiving equipment
JPS5471929A (en) Video signal level display method
JPS52108729A (en) Signal process circuit
JPS5286722A (en) Color television signal decoding unit
JPS5597785A (en) Chromaticity-signal phase control circuit
JPS52109824A (en) Phase comparator circuit
JPS5291322A (en) Television receiver
JPS53108717A (en) Auotmatic color synchronizing adjustment system
JPS5251823A (en) Color tv receiver
JPS5294729A (en) Hue adjustment circuit of color tv picture receiver
JPS5263616A (en) Time axis converter