JPS5413748A - Method and circuit for interruption synchronization on triple system - Google Patents

Method and circuit for interruption synchronization on triple system

Info

Publication number
JPS5413748A
JPS5413748A JP7916477A JP7916477A JPS5413748A JP S5413748 A JPS5413748 A JP S5413748A JP 7916477 A JP7916477 A JP 7916477A JP 7916477 A JP7916477 A JP 7916477A JP S5413748 A JPS5413748 A JP S5413748A
Authority
JP
Japan
Prior art keywords
circuit
interruption
triple system
interruption synchronization
synchronization
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7916477A
Other languages
Japanese (ja)
Other versions
JPS5637577B2 (en
Inventor
Yoji Ono
Tamito Tawara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
JAPANESE NATIONAL RAILWAYS<JNR>
Nippon Signal Co Ltd
Japan National Railways
Original Assignee
JAPANESE NATIONAL RAILWAYS<JNR>
Nippon Signal Co Ltd
Japan National Railways
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by JAPANESE NATIONAL RAILWAYS<JNR>, Nippon Signal Co Ltd, Japan National Railways filed Critical JAPANESE NATIONAL RAILWAYS<JNR>
Priority to JP7916477A priority Critical patent/JPS5413748A/en
Publication of JPS5413748A publication Critical patent/JPS5413748A/en
Publication of JPS5637577B2 publication Critical patent/JPS5637577B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Hardware Redundancy (AREA)
  • Multi Processors (AREA)

Abstract

PURPOSE: To synchronize CPU in respective systems when an interruption signal is generated, by causing an interruption to each computer by the computer system itself in case of the occurrence of an interruption from the outside.
COPYRIGHT: (C)1979,JPO&Japio
JP7916477A 1977-07-02 1977-07-02 Method and circuit for interruption synchronization on triple system Granted JPS5413748A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7916477A JPS5413748A (en) 1977-07-02 1977-07-02 Method and circuit for interruption synchronization on triple system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7916477A JPS5413748A (en) 1977-07-02 1977-07-02 Method and circuit for interruption synchronization on triple system

Publications (2)

Publication Number Publication Date
JPS5413748A true JPS5413748A (en) 1979-02-01
JPS5637577B2 JPS5637577B2 (en) 1981-09-01

Family

ID=13682309

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7916477A Granted JPS5413748A (en) 1977-07-02 1977-07-02 Method and circuit for interruption synchronization on triple system

Country Status (1)

Country Link
JP (1) JPS5413748A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5187935A (en) * 1975-01-31 1976-07-31 Hitachi Ltd 3 jukeidokiseigyosochi

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5187935A (en) * 1975-01-31 1976-07-31 Hitachi Ltd 3 jukeidokiseigyosochi

Also Published As

Publication number Publication date
JPS5637577B2 (en) 1981-09-01

Similar Documents

Publication Publication Date Title
JPS5255337A (en) Refresh control system
JPS53102643A (en) Interrupt processing system for computer
JPS5372541A (en) Interruption control system
JPS5391543A (en) Installation system for hdlc circuit
JPS5413748A (en) Method and circuit for interruption synchronization on triple system
JPS5323534A (en) Communication system between sub-systems
JPS5391741A (en) Computer control system of copier
JPS5378138A (en) Processing system for multiplex interruption
JPS537165A (en) Synchronism detecting circuit of phase control circuit
JPS535944A (en) Multi-system computer system constituted by simultaneous access prevention system of same data block
JPS5285444A (en) Information processing system
JPS531779A (en) Portable input unit for numerical control system
JPS5248447A (en) Re-synchronizing system
JPS5343449A (en) Interruption system for electronic computer
JPS5440054A (en) Information process system
JPS5368949A (en) Initial value set system
JPS5227232A (en) State control system of bus select circuit
JPS51130134A (en) Asynchronous data reception control system
JPS51140446A (en) Input output expansion system
JPS5295138A (en) Data processing system
JPS51150247A (en) Multiplex synchronous input system
JPS52127040A (en) Control signal introduction system
JPS533043A (en) Electronic computer
JPS51111027A (en) N+1 stand-by test method
JPS5394134A (en) Contens retaining system for main memory of computer