JPS54133810A - Automatic merit calculation unit - Google Patents

Automatic merit calculation unit

Info

Publication number
JPS54133810A
JPS54133810A JP4139378A JP4139378A JPS54133810A JP S54133810 A JPS54133810 A JP S54133810A JP 4139378 A JP4139378 A JP 4139378A JP 4139378 A JP4139378 A JP 4139378A JP S54133810 A JPS54133810 A JP S54133810A
Authority
JP
Japan
Prior art keywords
squelch
speech articulation
memory part
electric field
terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4139378A
Other languages
Japanese (ja)
Inventor
Hiroshi Takegaki
Hideo Yamashita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP4139378A priority Critical patent/JPS54133810A/en
Publication of JPS54133810A publication Critical patent/JPS54133810A/en
Pending legal-status Critical Current

Links

Landscapes

  • Noise Elimination (AREA)
  • Circuits Of Receivers In General (AREA)

Abstract

PURPOSE: To reduce errors due to an artificial monitor by providing an automatic calculating method for speech articulation.
CONSTITUTION: When a received electric field more than one squelch-set by squelch-adjusting variable resistor 3 is applied to reception part 1 with switch 12 ON, no squelch operation is done and an acoustic signal is transferred to speaker 5 via low-frequency amplifier 4. At this time, a high-level signal is outputted from terminal 7 of reception part 1 and at terminal 6, an analog signal appears which is in proportion to the received electric field. This analog signal is quantized 8 and stored in memory part 10a by a clock pulse from clock-pulse oscillator 9. In arithmetic part 10b, informaton on speech articulation stored in memory part 10a is integrated and this integration value is divided by a real time basing upon the clock pulse arriving at memory part 10a, thereby calculating mean speech articulation.
COPYRIGHT: (C)1979,JPO&Japio
JP4139378A 1978-04-07 1978-04-07 Automatic merit calculation unit Pending JPS54133810A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4139378A JPS54133810A (en) 1978-04-07 1978-04-07 Automatic merit calculation unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4139378A JPS54133810A (en) 1978-04-07 1978-04-07 Automatic merit calculation unit

Publications (1)

Publication Number Publication Date
JPS54133810A true JPS54133810A (en) 1979-10-17

Family

ID=12607122

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4139378A Pending JPS54133810A (en) 1978-04-07 1978-04-07 Automatic merit calculation unit

Country Status (1)

Country Link
JP (1) JPS54133810A (en)

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