JPS54129812A - Line monitor system - Google Patents

Line monitor system

Info

Publication number
JPS54129812A
JPS54129812A JP2514878A JP2514878A JPS54129812A JP S54129812 A JPS54129812 A JP S54129812A JP 2514878 A JP2514878 A JP 2514878A JP 2514878 A JP2514878 A JP 2514878A JP S54129812 A JPS54129812 A JP S54129812A
Authority
JP
Japan
Prior art keywords
signal
line
monitor
period
analog signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2514878A
Other languages
Japanese (ja)
Inventor
Tomonori Okada
Koji Yoshimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP2514878A priority Critical patent/JPS54129812A/en
Publication of JPS54129812A publication Critical patent/JPS54129812A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To monitor the failure with a simple circuit without loosing essential functions of analog signal, by utilizing the signal having predetermined frequency, period and level included in the input signal.
CONSTITUTION: In the line monitor system monitoring the condition of line at the reception side of the system transmitting and receiving the analog signal such as broadcast signal in which no redundancy is permitted to monitor the condition of line, the specific signal representing a given information every period predetermined, for example, time cast and synthronous signal, included in the analog signal, is utilized for line monitor by picking up it at the reception side 12. The signal inputted via the digital delivery line 13 with this constitution is converted into original analog signal with the D/A converter 23 and is outputted to the output terminal 25, and it is fed to the selection section 26' to pick up the specific signal every period with the designation pulse from the designation pulse generating section 31 and this specific signal is detected at the detection section 27' whether it is within the predetermined specific level or not, to perform line monitor.
COPYRIGHT: (C)1979,JPO&Japio
JP2514878A 1978-03-06 1978-03-06 Line monitor system Pending JPS54129812A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2514878A JPS54129812A (en) 1978-03-06 1978-03-06 Line monitor system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2514878A JPS54129812A (en) 1978-03-06 1978-03-06 Line monitor system

Publications (1)

Publication Number Publication Date
JPS54129812A true JPS54129812A (en) 1979-10-08

Family

ID=12157905

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2514878A Pending JPS54129812A (en) 1978-03-06 1978-03-06 Line monitor system

Country Status (1)

Country Link
JP (1) JPS54129812A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7364166B2 (en) 2003-01-24 2008-04-29 Applied Engineered Surfaces, Inc. Seal and retainer for a fluid connection

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7364166B2 (en) 2003-01-24 2008-04-29 Applied Engineered Surfaces, Inc. Seal and retainer for a fluid connection

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