JPS5412560A - Counter circuit - Google Patents

Counter circuit

Info

Publication number
JPS5412560A
JPS5412560A JP7876377A JP7876377A JPS5412560A JP S5412560 A JPS5412560 A JP S5412560A JP 7876377 A JP7876377 A JP 7876377A JP 7876377 A JP7876377 A JP 7876377A JP S5412560 A JPS5412560 A JP S5412560A
Authority
JP
Japan
Prior art keywords
elements
counter circuit
delayed
trigger
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7876377A
Other languages
Japanese (ja)
Inventor
Yasuhiko Okuyama
Takeshi Takitani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Original Assignee
Tokyo Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Sanyo Electric Co Ltd, Sanyo Electric Co Ltd filed Critical Tokyo Sanyo Electric Co Ltd
Priority to JP7876377A priority Critical patent/JPS5412560A/en
Publication of JPS5412560A publication Critical patent/JPS5412560A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K23/00—Pulse counters comprising counting chains; Frequency dividers comprising counting chains
    • H03K23/40—Gating or clocking signals applied to all stages, i.e. synchronous counters
    • H03K23/50—Gating or clocking signals applied to all stages, i.e. synchronous counters using bi-stable regenerative trigger circuits
    • H03K23/54—Ring counters, i.e. feedback shift register counters

Landscapes

  • Electric Clocks (AREA)

Abstract

PURPOSE:To obtain a circuit suitable for electronic watches, by constituting the circuit with trigger FF elements to which the counter pulse is fed and delayed FF elements used at and after the second stage and connecting the output of the trigger elements to the clock terminal of the delayed FF elements.
JP7876377A 1977-06-29 1977-06-29 Counter circuit Pending JPS5412560A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7876377A JPS5412560A (en) 1977-06-29 1977-06-29 Counter circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7876377A JPS5412560A (en) 1977-06-29 1977-06-29 Counter circuit

Publications (1)

Publication Number Publication Date
JPS5412560A true JPS5412560A (en) 1979-01-30

Family

ID=13670933

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7876377A Pending JPS5412560A (en) 1977-06-29 1977-06-29 Counter circuit

Country Status (1)

Country Link
JP (1) JPS5412560A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4991758A (en) * 1973-01-05 1974-09-02

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4991758A (en) * 1973-01-05 1974-09-02

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