JPS54118130A - Ghost reducing device - Google Patents

Ghost reducing device

Info

Publication number
JPS54118130A
JPS54118130A JP2579578A JP2579578A JPS54118130A JP S54118130 A JPS54118130 A JP S54118130A JP 2579578 A JP2579578 A JP 2579578A JP 2579578 A JP2579578 A JP 2579578A JP S54118130 A JPS54118130 A JP S54118130A
Authority
JP
Japan
Prior art keywords
output
distribution
supplied
ghost
input terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2579578A
Other languages
Japanese (ja)
Other versions
JPS6222308B2 (en
Inventor
Akira Usui
Minoru Miyata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2579578A priority Critical patent/JPS54118130A/en
Publication of JPS54118130A publication Critical patent/JPS54118130A/en
Publication of JPS6222308B2 publication Critical patent/JPS6222308B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/14—Picture signal circuitry for video frequency region
    • H04N5/21—Circuitry for suppressing or minimising disturbance, e.g. moiré or halo
    • H04N5/211—Ghost signal cancellation

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Picture Signal Circuits (AREA)
  • Television Receiver Circuits (AREA)

Abstract

PURPOSE:To suppress the contrast variation for the screen under the ghost reduction adjusting process as well as to ensure an easy adjustment for the ghost reduction by limiting the amplitude of the signal applied to the TV picture reveiver. CONSTITUTION:The video signal containing the ghost signal is supplied to input terminal T3 of one side of voltage gain variable device D, and the output of device D is supplied to input terminal T1 of one side of adder circuit A. And the distribution output given from output terminal T2 of the other side of distribution device B is applied to distribution device E, and the distribution output given from output terminal T8 of the other side of device E is supplied to peak value detecting device F. The detection potential of device F is supplied to input terminal T4 of the other side of device D in the form of the gain variable potential to close the feedback system and thus to control the distribution output from the other output terminal T7 of device E, i.e., the ghost reduction process signal to be under the fixed amplitude.
JP2579578A 1978-03-06 1978-03-06 Ghost reducing device Granted JPS54118130A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2579578A JPS54118130A (en) 1978-03-06 1978-03-06 Ghost reducing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2579578A JPS54118130A (en) 1978-03-06 1978-03-06 Ghost reducing device

Publications (2)

Publication Number Publication Date
JPS54118130A true JPS54118130A (en) 1979-09-13
JPS6222308B2 JPS6222308B2 (en) 1987-05-18

Family

ID=12175762

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2579578A Granted JPS54118130A (en) 1978-03-06 1978-03-06 Ghost reducing device

Country Status (1)

Country Link
JP (1) JPS54118130A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS572109A (en) * 1980-06-05 1982-01-07 Toshiba Corp Automatic gain control circuit
JPS5848581A (en) * 1981-09-17 1983-03-22 Matsushita Electric Ind Co Ltd Ghost eliminating device
JPS58124379A (en) * 1982-01-20 1983-07-23 Matsushita Electric Ind Co Ltd Video demodulation device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5031722A (en) * 1973-07-20 1975-03-28

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5031722A (en) * 1973-07-20 1975-03-28

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS572109A (en) * 1980-06-05 1982-01-07 Toshiba Corp Automatic gain control circuit
JPH026468B2 (en) * 1980-06-05 1990-02-09 Toshiba Kk
JPS5848581A (en) * 1981-09-17 1983-03-22 Matsushita Electric Ind Co Ltd Ghost eliminating device
JPS58124379A (en) * 1982-01-20 1983-07-23 Matsushita Electric Ind Co Ltd Video demodulation device
JPH0231913B2 (en) * 1982-01-20 1990-07-17 Matsushita Electric Ind Co Ltd

Also Published As

Publication number Publication date
JPS6222308B2 (en) 1987-05-18

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