JPS54109315A - Character-broadcasting demodulator - Google Patents

Character-broadcasting demodulator

Info

Publication number
JPS54109315A
JPS54109315A JP1726878A JP1726878A JPS54109315A JP S54109315 A JPS54109315 A JP S54109315A JP 1726878 A JP1726878 A JP 1726878A JP 1726878 A JP1726878 A JP 1726878A JP S54109315 A JPS54109315 A JP S54109315A
Authority
JP
Japan
Prior art keywords
signal
character
circuit
memory
character signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1726878A
Other languages
Japanese (ja)
Inventor
Tadao Nakamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP1726878A priority Critical patent/JPS54109315A/en
Publication of JPS54109315A publication Critical patent/JPS54109315A/en
Pending legal-status Critical Current

Links

Landscapes

  • Television Systems (AREA)

Abstract

PURPOSE: To allow one receiver to display a picture and character signal of different channels by providing a method smapling the character signal from the 1st TV signal and that stored with the character signal in the synchronous phase of the 2nd TV signal.
CONSTITUTION: The 2nd TV signal from 2nd reception part 10 passes through switching circuit 8 and has only its image reproduced by display part 9. The 1st TV signal including a character signal in each field received by the 1st reception part 1 has only its character signal sampled by character signal sampling circuit 2 and is written in buffer memory 3 through the control of control circuit 7. By coincidence detection input switching circuit 12 and coincidence detection circuit 4, transfer gate 5 is opened to store the character signal of memory 3 in main memory 6. Control circuit 11 applies a clock signal synchronizing with the 2nd TV signal and a count output as to the number of lines to circuit 12 to apply the read-out clock signal of the 2nd TV signal to memory 6 and, conseuqently, memory 6 sends the character signal read out by this signal to display part 9 via circuit 8, so that its will be displayed together with the image of the 2nd TV signal.
COPYRIGHT: (C)1979,JPO&Japio
JP1726878A 1978-02-15 1978-02-15 Character-broadcasting demodulator Pending JPS54109315A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1726878A JPS54109315A (en) 1978-02-15 1978-02-15 Character-broadcasting demodulator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1726878A JPS54109315A (en) 1978-02-15 1978-02-15 Character-broadcasting demodulator

Publications (1)

Publication Number Publication Date
JPS54109315A true JPS54109315A (en) 1979-08-27

Family

ID=11939212

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1726878A Pending JPS54109315A (en) 1978-02-15 1978-02-15 Character-broadcasting demodulator

Country Status (1)

Country Link
JP (1) JPS54109315A (en)

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