JPS5410836B1 - - Google Patents

Info

Publication number
JPS5410836B1
JPS5410836B1 JP5514870A JP5514870A JPS5410836B1 JP S5410836 B1 JPS5410836 B1 JP S5410836B1 JP 5514870 A JP5514870 A JP 5514870A JP 5514870 A JP5514870 A JP 5514870A JP S5410836 B1 JPS5410836 B1 JP S5410836B1
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5514870A
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP5514870A priority Critical patent/JPS5410836B1/ja
Priority to US00156709A priority patent/US3789503A/en
Publication of JPS5410836B1 publication Critical patent/JPS5410836B1/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0638—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for preventing surface leakage due to surface inversion layer, e.g. with channel stopper
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0255—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using diodes as protective elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP5514870A 1970-06-26 1970-06-26 Pending JPS5410836B1 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP5514870A JPS5410836B1 (ja) 1970-06-26 1970-06-26
US00156709A US3789503A (en) 1970-06-26 1971-06-25 Insulated gate type field effect device and method of making the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5514870A JPS5410836B1 (ja) 1970-06-26 1970-06-26

Publications (1)

Publication Number Publication Date
JPS5410836B1 true JPS5410836B1 (ja) 1979-05-10

Family

ID=12990664

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5514870A Pending JPS5410836B1 (ja) 1970-06-26 1970-06-26

Country Status (2)

Country Link
US (1) US3789503A (ja)
JP (1) JPS5410836B1 (ja)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3983572A (en) * 1973-07-09 1976-09-28 International Business Machines Semiconductor devices
JPS5321989B2 (ja) * 1973-10-12 1978-07-06
US4075754A (en) * 1974-02-26 1978-02-28 Harris Corporation Self aligned gate for di-CMOS
JPS5851427B2 (ja) * 1975-09-04 1983-11-16 株式会社日立製作所 絶縁ゲ−ト型リ−ド・オンリ−・メモリの製造方法
IT1150062B (it) * 1980-11-19 1986-12-10 Ates Componenti Elettron Protezione di ingresso per circuito integrato di tipo mos, a bassa tensione di alimentazione e ad alta densita' di integrazione
NL8100347A (nl) * 1981-01-26 1982-08-16 Philips Nv Halfgeleiderinrichting met een beveiligingsinrichting.
US4543597A (en) * 1982-06-30 1985-09-24 Tokyo Shibaura Denki Kabushiki Kaisha Dynamic semiconductor memory and manufacturing method thereof
US5032878A (en) * 1990-01-02 1991-07-16 Motorola, Inc. High voltage planar edge termination using a punch-through retarding implant
US5386180A (en) * 1990-01-17 1995-01-31 Olympus Optical Co., Ltd. Strobo apparatus
US5543642A (en) * 1991-10-23 1996-08-06 Robert Bosch Gmbh P-channel transistor
EP0656152A1 (en) * 1992-08-14 1995-06-07 International Business Machines Corporation Mos device having protection against electrostatic discharge
JP3216743B2 (ja) * 1993-04-22 2001-10-09 富士電機株式会社 トランジスタ用保護ダイオード
US6245610B1 (en) * 1999-09-28 2001-06-12 United Microelectronics Corp. Method of protecting a well at a floating stage
KR100393200B1 (ko) * 2001-02-20 2003-07-31 페어차일드코리아반도체 주식회사 정전기적 방전으로부터의 보호를 위한 필드 트랜지스터 및그 제조방법
US6797992B2 (en) * 2001-08-07 2004-09-28 Fabtech, Inc. Apparatus and method for fabricating a high reverse voltage semiconductor device
DE102005044124B4 (de) * 2005-09-15 2010-11-25 Texas Instruments Deutschland Gmbh Verfahren zur Herstellung einer integrierten Schaltung mit Gate-Selbstschutz, und integrierte Schaltung mit Gate-Selbstschutz

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3450959A (en) * 1965-07-06 1969-06-17 Sylvania Electric Prod Four-layer semiconductor switching devices in integrated circuitry
US3370995A (en) * 1965-08-02 1968-02-27 Texas Instruments Inc Method for fabricating electrically isolated semiconductor devices in integrated circuits
US3701198A (en) * 1970-08-14 1972-10-31 Bell Telephone Labor Inc Monolithic integrated circuit structures and methods of making same

Also Published As

Publication number Publication date
US3789503A (en) 1974-02-05

Similar Documents

Publication Publication Date Title
JPS5410836B1 (ja)
ATA96471A (ja)
AU1146470A (ja)
AU2044470A (ja)
AU1716970A (ja)
AU1833270A (ja)
AU2017870A (ja)
AU2085370A (ja)
AU442493B2 (ja)
AU1974970A (ja)
AU2112570A (ja)
AU1689770A (ja)
AU1969370A (ja)
AU1789870A (ja)
AU1832970A (ja)
AU1189670A (ja)
AU1841070A (ja)
AU1086670A (ja)
AU1872870A (ja)
AU1879170A (ja)
AU1247570A (ja)
AU1277070A (ja)
AU1064870A (ja)
AU1004470A (ja)
AU2144270A (ja)