JPS54101132A - Inverter protecting device - Google Patents

Inverter protecting device

Info

Publication number
JPS54101132A
JPS54101132A JP719278A JP719278A JPS54101132A JP S54101132 A JPS54101132 A JP S54101132A JP 719278 A JP719278 A JP 719278A JP 719278 A JP719278 A JP 719278A JP S54101132 A JPS54101132 A JP S54101132A
Authority
JP
Japan
Prior art keywords
output
comparator
adder
service
power interruption
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP719278A
Other languages
Japanese (ja)
Inventor
Tadashi Okawa
Mitsusachi Motobe
Yasuo Matsuda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP719278A priority Critical patent/JPS54101132A/en
Publication of JPS54101132A publication Critical patent/JPS54101132A/en
Pending legal-status Critical Current

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  • Inverter Devices (AREA)

Abstract

PURPOSE: To suppress an overvoltage fully to a low level at the time of power interruption of service, by operating a detection of the power interruption of service without delay, using a waveform shaping circuit, for shaping the power source voltage into a square wave, and an adder circuit, for adding an output of said waveform shaping circuit.
CONSTITUTION: With a power interruption of service occurring, output of a transformer 20 is lost. In case of the power source being three-phase in Y-connection, output of an adder 44 becomes zero in three stages, and in delta-connection, in two stages. When the output of te adder 44 comes to be below the reference voltage, a comparator 45 makes an outputting. The output of the comparator 45 makes an integrator 47 to stat an integration, and with an integrated voltage of the integrator 47 exceeding the reference voltage 49, a comparator 48 makes an outputting, causing a pulse generator 50 to output a pulse. This pulse is fed to the rectifier, becoming a signal to construct a bypass pair circuit.
COPYRIGHT: (C)1979,JPO&Japio
JP719278A 1978-01-27 1978-01-27 Inverter protecting device Pending JPS54101132A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP719278A JPS54101132A (en) 1978-01-27 1978-01-27 Inverter protecting device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP719278A JPS54101132A (en) 1978-01-27 1978-01-27 Inverter protecting device

Publications (1)

Publication Number Publication Date
JPS54101132A true JPS54101132A (en) 1979-08-09

Family

ID=11659165

Family Applications (1)

Application Number Title Priority Date Filing Date
JP719278A Pending JPS54101132A (en) 1978-01-27 1978-01-27 Inverter protecting device

Country Status (1)

Country Link
JP (1) JPS54101132A (en)

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