JPS5384656A - Precedence control system - Google Patents

Precedence control system

Info

Publication number
JPS5384656A
JPS5384656A JP15920476A JP15920476A JPS5384656A JP S5384656 A JPS5384656 A JP S5384656A JP 15920476 A JP15920476 A JP 15920476A JP 15920476 A JP15920476 A JP 15920476A JP S5384656 A JPS5384656 A JP S5384656A
Authority
JP
Japan
Prior art keywords
control system
precedence
precedence control
properly
providing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15920476A
Other languages
Japanese (ja)
Inventor
Hiroshi Nakamura
Yukio Soma
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP15920476A priority Critical patent/JPS5384656A/en
Publication of JPS5384656A publication Critical patent/JPS5384656A/en
Pending legal-status Critical Current

Links

Landscapes

  • Multi Processors (AREA)
  • Memory System (AREA)

Abstract

PURPOSE: To control the precedence properly by providing a memory access-request selector circuit.
COPYRIGHT: (C)1978,JPO&Japio
JP15920476A 1976-12-30 1976-12-30 Precedence control system Pending JPS5384656A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15920476A JPS5384656A (en) 1976-12-30 1976-12-30 Precedence control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15920476A JPS5384656A (en) 1976-12-30 1976-12-30 Precedence control system

Publications (1)

Publication Number Publication Date
JPS5384656A true JPS5384656A (en) 1978-07-26

Family

ID=15688586

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15920476A Pending JPS5384656A (en) 1976-12-30 1976-12-30 Precedence control system

Country Status (1)

Country Link
JP (1) JPS5384656A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5544700A (en) * 1978-09-25 1980-03-29 Motorola Inc Data processor equipped with real time* capture register
JPS55103657A (en) * 1979-02-05 1980-08-08 Hitachi Ltd Priority circuit
JPS56157542A (en) * 1980-05-09 1981-12-04 Nec Corp Dispatching system
JPS5717067A (en) * 1980-07-04 1982-01-28 Panafacom Ltd Conflict control system of common memory
JPS61166632A (en) * 1985-01-18 1986-07-28 Nec Corp Interruption processor
JPH01184546A (en) * 1988-01-19 1989-07-24 Nec Corp Single chip microcomputer

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5544700A (en) * 1978-09-25 1980-03-29 Motorola Inc Data processor equipped with real time* capture register
JPS55103657A (en) * 1979-02-05 1980-08-08 Hitachi Ltd Priority circuit
JPS56157542A (en) * 1980-05-09 1981-12-04 Nec Corp Dispatching system
JPS6323588B2 (en) * 1980-05-09 1988-05-17 Nippon Electric Co
JPS5717067A (en) * 1980-07-04 1982-01-28 Panafacom Ltd Conflict control system of common memory
JPH0137778B2 (en) * 1980-07-04 1989-08-09 Pfu Ltd
JPS61166632A (en) * 1985-01-18 1986-07-28 Nec Corp Interruption processor
JPH0447338B2 (en) * 1985-01-18 1992-08-03 Nippon Electric Co
JPH01184546A (en) * 1988-01-19 1989-07-24 Nec Corp Single chip microcomputer

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