JPS537349B2 - - Google Patents
Info
- Publication number
- JPS537349B2 JPS537349B2 JP3356674A JP3356674A JPS537349B2 JP S537349 B2 JPS537349 B2 JP S537349B2 JP 3356674 A JP3356674 A JP 3356674A JP 3356674 A JP3356674 A JP 3356674A JP S537349 B2 JPS537349 B2 JP S537349B2
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/50—Adding; Subtracting
- G06F7/505—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination
- G06F7/5055—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination in which one operand is a constant, i.e. incrementers or decrementers
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K23/00—Pulse counters comprising counting chains; Frequency dividers comprising counting chains
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Pure & Applied Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computing Systems (AREA)
- Mathematical Optimization (AREA)
- General Engineering & Computer Science (AREA)
- Logic Circuits (AREA)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3356674A JPS537349B2 (ja) | 1974-03-27 | 1974-03-27 | |
US05/560,488 US3989940A (en) | 1974-03-27 | 1975-03-20 | Binary incrementer circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3356674A JPS537349B2 (ja) | 1974-03-27 | 1974-03-27 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS50128452A JPS50128452A (ja) | 1975-10-09 |
JPS537349B2 true JPS537349B2 (ja) | 1978-03-16 |
Family
ID=12390082
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3356674A Expired JPS537349B2 (ja) | 1974-03-27 | 1974-03-27 |
Country Status (2)
Country | Link |
---|---|
US (1) | US3989940A (ja) |
JP (1) | JPS537349B2 (ja) |
Families Citing this family (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4153939A (en) * | 1976-01-24 | 1979-05-08 | Nippon Electric Co., Ltd. | Incrementer circuit |
US4054788A (en) * | 1976-06-04 | 1977-10-18 | Hewlett-Packard Company | Modular binary half-adder |
US4218750A (en) * | 1978-09-25 | 1980-08-19 | Motorola, Inc. | Incrementer with common precharge enable and carry-in signal |
US4280190A (en) * | 1979-08-09 | 1981-07-21 | Motorola, Inc. | Incrementer/decrementer circuit |
JPS5668801A (en) | 1979-11-09 | 1981-06-09 | Hitachi Ltd | Engine control unit |
JPS57116424A (en) * | 1981-01-13 | 1982-07-20 | Toshiba Corp | Parallel-to-serial converting circuit |
US4417315A (en) * | 1981-07-14 | 1983-11-22 | Rockwell International Corporation | Method and apparatus for incrementing a digital word |
US4417316A (en) * | 1981-07-14 | 1983-11-22 | Rockwell International Corporation | Digital binary increment circuit apparatus |
US4445414A (en) * | 1982-02-24 | 1984-05-01 | Apple Computer, Inc. | Digital, simultaneous, discrete frequency generator |
US4486851A (en) * | 1982-07-01 | 1984-12-04 | Rca Corporation | Incrementing/decrementing circuit as for a FIR filter |
GB2127187B (en) * | 1982-08-23 | 1986-03-05 | Hewlett Packard Co | Circuits for operating on n-digit operands |
US4648058A (en) * | 1984-04-03 | 1987-03-03 | Trw Inc. | Look-ahead rounding circuit |
US4685078A (en) * | 1984-10-31 | 1987-08-04 | International Business Machines Corporation | Dual incrementor |
DE3665234D1 (en) * | 1985-01-29 | 1989-09-28 | Siemens Ag | Arrangement for increasing or decreasing a binary operand with a predeterminated value |
DE3609056A1 (de) * | 1985-03-18 | 1986-09-18 | Nec Corp., Tokio/Tokyo | Zaehlerschaltkreis |
US4623982A (en) | 1985-06-10 | 1986-11-18 | Hewlett-Packard Company | Conditional carry techniques for digital processors |
US5619441A (en) * | 1994-10-14 | 1997-04-08 | International Business Machines Corporation | High speed dynamic binary incrementer |
US5563814A (en) * | 1995-02-21 | 1996-10-08 | Delco Electronics Corporation | Reduced circuitry implementation for coverting two equal values to non-equal values |
US6279024B1 (en) * | 1996-01-04 | 2001-08-21 | International Business Machines Corporation | High performance, low power incrementer for dynamic circuits |
US5877972A (en) * | 1997-01-15 | 1999-03-02 | International Business Machines Corporation | High speed incrementer with array method |
US6665698B1 (en) * | 2000-05-12 | 2003-12-16 | Hewlett-Packard Development Company, L.P. | High speed incrementer/decrementer |
EP1394673A1 (en) * | 2002-08-30 | 2004-03-03 | STMicroelectronics S.r.l. | Method and circuit for incrementing, decrementing or two complementing a bit string |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR1538083A (fr) * | 1966-09-28 | 1968-08-30 | Ibm | Dispositif arithmétique |
CH491565A (it) * | 1967-06-09 | 1970-05-31 | Sits Soc It Telecom Siemens | Circuito di memoria e di conteggio di informazio ni numeriche elaborate secondo il principio della divisione di tempo, specialmente impiegabile nella tariffazione e nella commutazione telefonica |
US3675000A (en) * | 1970-08-06 | 1972-07-04 | Sperry Rand Corp | Apparatus for arithmetic operations by alerting the corresponding digits of the operands |
US3704361A (en) * | 1971-04-30 | 1972-11-28 | North Electric Co | Binary synchronous up/down counter |
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1974
- 1974-03-27 JP JP3356674A patent/JPS537349B2/ja not_active Expired
-
1975
- 1975-03-20 US US05/560,488 patent/US3989940A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
USB560488I5 (ja) | 1976-03-16 |
US3989940A (en) | 1976-11-02 |
JPS50128452A (ja) | 1975-10-09 |