JPS5353933A - Timing generating system for memory readout - Google Patents
Timing generating system for memory readoutInfo
- Publication number
- JPS5353933A JPS5353933A JP12822176A JP12822176A JPS5353933A JP S5353933 A JPS5353933 A JP S5353933A JP 12822176 A JP12822176 A JP 12822176A JP 12822176 A JP12822176 A JP 12822176A JP S5353933 A JPS5353933 A JP S5353933A
- Authority
- JP
- Japan
- Prior art keywords
- generating system
- timing generating
- memory readout
- memory
- readout
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/4076—Timing circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Static Random-Access Memory (AREA)
Abstract
PURPOSE:To eliminate the malfunction due to the reflection signal caused by the wiring connecting a plural number of IC memory units, and to reduce the across time of data.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12822176A JPS5353933A (en) | 1976-10-27 | 1976-10-27 | Timing generating system for memory readout |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12822176A JPS5353933A (en) | 1976-10-27 | 1976-10-27 | Timing generating system for memory readout |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5353933A true JPS5353933A (en) | 1978-05-16 |
Family
ID=14979481
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12822176A Pending JPS5353933A (en) | 1976-10-27 | 1976-10-27 | Timing generating system for memory readout |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5353933A (en) |
-
1976
- 1976-10-27 JP JP12822176A patent/JPS5353933A/en active Pending
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