JPS5338A - Bit processor - Google Patents

Bit processor

Info

Publication number
JPS5338A
JPS5338A JP7483376A JP7483376A JPS5338A JP S5338 A JPS5338 A JP S5338A JP 7483376 A JP7483376 A JP 7483376A JP 7483376 A JP7483376 A JP 7483376A JP S5338 A JPS5338 A JP S5338A
Authority
JP
Japan
Prior art keywords
bit processor
logic
writing
rom
producing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7483376A
Other languages
Japanese (ja)
Inventor
Takeshi Tokuda
Mitsuo Nakayama
Yoshiaki Umeda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP7483376A priority Critical patent/JPS5338A/en
Publication of JPS5338A publication Critical patent/JPS5338A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22—Microcontrol or microprogram arrangements
    • G06F9/223—Execution means for microinstructions irrespective of the microinstruction function, e.g. decoding of microinstructions and nanoinstructions; timing of microinstructions; programmable logic arrays; delays and fan-out problems

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microcomputers (AREA)

Abstract

PURPOSE:To form a small-or intermediate-scale hard wired logic into the standard LSI by producing a program corresponding to a logic and by writing it into ROM only.
JP7483376A 1976-06-23 1976-06-23 Bit processor Pending JPS5338A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7483376A JPS5338A (en) 1976-06-23 1976-06-23 Bit processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7483376A JPS5338A (en) 1976-06-23 1976-06-23 Bit processor

Publications (1)

Publication Number Publication Date
JPS5338A true JPS5338A (en) 1978-01-05

Family

ID=13558725

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7483376A Pending JPS5338A (en) 1976-06-23 1976-06-23 Bit processor

Country Status (1)

Country Link
JP (1) JPS5338A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5543612A (en) * 1978-09-22 1980-03-27 Hitachi Ltd Logic arithmetic unit
JPS59112334A (en) * 1982-11-20 1984-06-28 インターナショナル　コンピューターズ　リミテッド Sequence generator
US4487876A (en) * 1981-07-14 1984-12-11 Minnesota Mining & Mfg Wire coating composition

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5543612A (en) * 1978-09-22 1980-03-27 Hitachi Ltd Logic arithmetic unit
US4487876A (en) * 1981-07-14 1984-12-11 Minnesota Mining & Mfg Wire coating composition
JPS59112334A (en) * 1982-11-20 1984-06-28 インターナショナル　コンピューターズ　リミテッド Sequence generator

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