JPS5324208Y2 - - Google Patents
Info
- Publication number
- JPS5324208Y2 JPS5324208Y2 JP8262072U JP8262072U JPS5324208Y2 JP S5324208 Y2 JPS5324208 Y2 JP S5324208Y2 JP 8262072 U JP8262072 U JP 8262072U JP 8262072 U JP8262072 U JP 8262072U JP S5324208 Y2 JPS5324208 Y2 JP S5324208Y2
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Lead Frames For Integrated Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8262072U JPS5324208Y2 (en:Method) | 1972-07-11 | 1972-07-11 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8262072U JPS5324208Y2 (en:Method) | 1972-07-11 | 1972-07-11 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS4939368U JPS4939368U (en:Method) | 1974-04-06 |
| JPS5324208Y2 true JPS5324208Y2 (en:Method) | 1978-06-21 |
Family
ID=27990198
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8262072U Expired JPS5324208Y2 (en:Method) | 1972-07-11 | 1972-07-11 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5324208Y2 (en:Method) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5844582Y2 (ja) * | 1975-06-18 | 1983-10-08 | 松下電器産業株式会社 | 変成器 |
| JPS5844583Y2 (ja) * | 1975-06-18 | 1983-10-08 | 松下電器産業株式会社 | 変成器 |
| JP6787118B2 (ja) * | 2016-12-28 | 2020-11-18 | 三菱電機株式会社 | 半導体装置、電力変換装置、リードフレーム、および半導体装置の製造方法 |
-
1972
- 1972-07-11 JP JP8262072U patent/JPS5324208Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS4939368U (en:Method) | 1974-04-06 |