JPS5323549A - Synthesizer circuit system - Google Patents

Synthesizer circuit system

Info

Publication number
JPS5323549A
JPS5323549A JP9847176A JP9847176A JPS5323549A JP S5323549 A JPS5323549 A JP S5323549A JP 9847176 A JP9847176 A JP 9847176A JP 9847176 A JP9847176 A JP 9847176A JP S5323549 A JPS5323549 A JP S5323549A
Authority
JP
Japan
Prior art keywords
circuit system
synthesizer circuit
voltage control
control oscillator
constant
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9847176A
Other languages
Japanese (ja)
Inventor
Hiromi Kusakabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP9847176A priority Critical patent/JPS5323549A/en
Publication of JPS5323549A publication Critical patent/JPS5323549A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

PURPOSE:To provide an attenuator and a DC amplifier at the input teminal of a voltage control oscillator in order to ensure almost a constant gain ratio of the voltage control oscillator against the division ratio of a programable divider. Thus, a constant reply can be secured for the phase lock loop.
JP9847176A 1976-08-18 1976-08-18 Synthesizer circuit system Pending JPS5323549A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9847176A JPS5323549A (en) 1976-08-18 1976-08-18 Synthesizer circuit system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9847176A JPS5323549A (en) 1976-08-18 1976-08-18 Synthesizer circuit system

Publications (1)

Publication Number Publication Date
JPS5323549A true JPS5323549A (en) 1978-03-04

Family

ID=14220573

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9847176A Pending JPS5323549A (en) 1976-08-18 1976-08-18 Synthesizer circuit system

Country Status (1)

Country Link
JP (1) JPS5323549A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0288333U (en) * 1988-12-24 1990-07-12

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0288333U (en) * 1988-12-24 1990-07-12

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