JPS5318992A - Production of light emitting element - Google Patents
Production of light emitting elementInfo
- Publication number
- JPS5318992A JPS5318992A JP9384076A JP9384076A JPS5318992A JP S5318992 A JPS5318992 A JP S5318992A JP 9384076 A JP9384076 A JP 9384076A JP 9384076 A JP9384076 A JP 9384076A JP S5318992 A JPS5318992 A JP S5318992A
- Authority
- JP
- Japan
- Prior art keywords
- light emitting
- production
- emitting element
- good
- molding
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Led Device Packages (AREA)
Abstract
PURPOSE: Light emitting diodes of good appearance are produced with good mass productivity by using transfer-molding-purpose resin.
COPYRIGHT: (C)1978,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9384076A JPS5318992A (en) | 1976-08-05 | 1976-08-05 | Production of light emitting element |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9384076A JPS5318992A (en) | 1976-08-05 | 1976-08-05 | Production of light emitting element |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5318992A true JPS5318992A (en) | 1978-02-21 |
Family
ID=14093580
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9384076A Pending JPS5318992A (en) | 1976-08-05 | 1976-08-05 | Production of light emitting element |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5318992A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4590667A (en) * | 1984-08-22 | 1986-05-27 | General Instrument Corporation | Method and apparatus for assembling semiconductor devices such as LEDs or optodetectors |
JPH0160560U (en) * | 1987-10-09 | 1989-04-17 |
-
1976
- 1976-08-05 JP JP9384076A patent/JPS5318992A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4590667A (en) * | 1984-08-22 | 1986-05-27 | General Instrument Corporation | Method and apparatus for assembling semiconductor devices such as LEDs or optodetectors |
JPH0160560U (en) * | 1987-10-09 | 1989-04-17 |
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