JPS53149669A - Method of forming multilayer circuit layer having resistance layer - Google Patents

Method of forming multilayer circuit layer having resistance layer

Info

Publication number
JPS53149669A
JPS53149669A JP6333277A JP6333277A JPS53149669A JP S53149669 A JPS53149669 A JP S53149669A JP 6333277 A JP6333277 A JP 6333277A JP 6333277 A JP6333277 A JP 6333277A JP S53149669 A JPS53149669 A JP S53149669A
Authority
JP
Japan
Prior art keywords
layer
multilayer circuit
forming multilayer
circuit layer
resistance layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6333277A
Other languages
Japanese (ja)
Other versions
JPS6230517B2 (en
Inventor
Tsuneo Endou
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP6333277A priority Critical patent/JPS53149669A/en
Publication of JPS53149669A publication Critical patent/JPS53149669A/en
Publication of JPS6230517B2 publication Critical patent/JPS6230517B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Parts Printed On Printed Circuit Boards (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
JP6333277A 1977-06-01 1977-06-01 Method of forming multilayer circuit layer having resistance layer Granted JPS53149669A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6333277A JPS53149669A (en) 1977-06-01 1977-06-01 Method of forming multilayer circuit layer having resistance layer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6333277A JPS53149669A (en) 1977-06-01 1977-06-01 Method of forming multilayer circuit layer having resistance layer

Publications (2)

Publication Number Publication Date
JPS53149669A true JPS53149669A (en) 1978-12-27
JPS6230517B2 JPS6230517B2 (en) 1987-07-02

Family

ID=13226175

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6333277A Granted JPS53149669A (en) 1977-06-01 1977-06-01 Method of forming multilayer circuit layer having resistance layer

Country Status (1)

Country Link
JP (1) JPS53149669A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003110207A (en) * 2001-09-28 2003-04-11 Alps Electric Co Ltd Flexible substrate

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS504575A (en) * 1973-05-18 1975-01-17

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS504575A (en) * 1973-05-18 1975-01-17

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003110207A (en) * 2001-09-28 2003-04-11 Alps Electric Co Ltd Flexible substrate

Also Published As

Publication number Publication date
JPS6230517B2 (en) 1987-07-02

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