JPS53132951A - Method of discriminating error - Google Patents
Method of discriminating errorInfo
- Publication number
- JPS53132951A JPS53132951A JP3495678A JP3495678A JPS53132951A JP S53132951 A JPS53132951 A JP S53132951A JP 3495678 A JP3495678 A JP 3495678A JP 3495678 A JP3495678 A JP 3495678A JP S53132951 A JPS53132951 A JP S53132951A
- Authority
- JP
- Japan
- Prior art keywords
- discriminating error
- discriminating
- error
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1076—Parity data used in redundant arrays of independent storages, e.g. in RAID systems
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Error Detection And Correction (AREA)
- Debugging And Monitoring (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
- Detection And Correction Of Errors (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US05/790,506 US4100403A (en) | 1977-04-25 | 1977-04-25 | Method and means for discriminating between systematic and noise-induced error in data extracted from word organized memory arrays |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS53132951A true JPS53132951A (en) | 1978-11-20 |
JPS5746160B2 JPS5746160B2 (ja) | 1982-10-01 |
Family
ID=25150893
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3495678A Granted JPS53132951A (en) | 1977-04-25 | 1978-03-28 | Method of discriminating error |
Country Status (5)
Country | Link |
---|---|
US (1) | US4100403A (ja) |
JP (1) | JPS53132951A (ja) |
DE (1) | DE2816771A1 (ja) |
FR (1) | FR2389198A1 (ja) |
GB (1) | GB1580869A (ja) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2811318C2 (de) * | 1978-03-16 | 1983-02-17 | Ibm Deutschland Gmbh, 7000 Stuttgart | Einrichtung zur Übertragung und Speicherung eines Teilwortes |
US4506362A (en) * | 1978-12-22 | 1985-03-19 | Gould Inc. | Systematic memory error detection and correction apparatus and method |
US4360915A (en) * | 1979-02-07 | 1982-11-23 | The Warner & Swasey Company | Error detection means |
US4360917A (en) * | 1979-02-07 | 1982-11-23 | The Warner & Swasey Company | Parity fault locating means |
US4319357A (en) * | 1979-12-14 | 1982-03-09 | International Business Machines Corp. | Double error correction using single error correcting code |
NL8202365A (nl) * | 1982-06-11 | 1984-01-02 | Philips Nv | Serie-parallel-serie schuifregistergeheugen, hetwelk redundante parallelgeschakelde opslagregisters bevat, en afbeeldtoestel, voorzien van een zodanig georganiseerd beeldgeheugen. |
JPS595497A (ja) * | 1982-07-02 | 1984-01-12 | Hitachi Ltd | 半導体rom |
US4891811A (en) * | 1987-02-13 | 1990-01-02 | International Business Machines Corporation | Efficient address test for large memories |
US5598422A (en) * | 1990-04-30 | 1997-01-28 | Dell Usa, L.P. | Digital computer having an error correction code (ECC) system with comparator integrated into re-encoder |
US5459742A (en) * | 1992-06-11 | 1995-10-17 | Quantum Corporation | Solid state disk memory using storage devices with defects |
US6795849B1 (en) * | 2001-04-25 | 2004-09-21 | Lsi Logic Corporation | Paradigm for inter-networked storage |
EP1560118A1 (en) * | 2004-01-27 | 2005-08-03 | Infineon Technologies AG | Error detection and correction device and method |
US7526715B2 (en) * | 2005-10-17 | 2009-04-28 | Ramot At Tel Aviv University Ltd. | Probabilistic error correction in multi-bit-per-cell flash memory |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3245049A (en) * | 1963-12-24 | 1966-04-05 | Ibm | Means for correcting bad memory bits by bit address storage |
DE2134529A1 (de) * | 1971-07-10 | 1973-01-25 | Ibm Deutschland | Verfahren zur fehlererkennung und -korrektur in aus dem speicher einer programmgesteuerten datenverarbeitungsanlage ausgelesenen informationswoertern |
US3774153A (en) * | 1971-11-09 | 1973-11-20 | Bell Telephone Labor Inc | Field-accessed, single-wall domain apparatus utilizing interacting shift register loops |
USRE28923E (en) | 1971-12-27 | 1976-08-03 | International Business Machines Corporation | Error correction for two bytes in each code word in a multi-code word system |
US3792450A (en) * | 1972-05-08 | 1974-02-12 | Singer Co | System for overcoming faults in magnetic anisotropic material |
US3868632A (en) * | 1972-11-15 | 1975-02-25 | Ibm | Plural channel error correcting apparatus and methods |
US3909810A (en) * | 1974-02-25 | 1975-09-30 | Texas Instruments Inc | Bubble memory minor loop redundancy scheme |
US4005405A (en) * | 1975-05-07 | 1977-01-25 | Data General Corporation | Error detection and correction in data processing systems |
US4030067A (en) * | 1975-12-29 | 1977-06-14 | Honeywell Information Systems, Inc. | Table lookup direct decoder for double-error correcting (DEC) BCH codes using a pair of syndromes |
BE849126A (fr) * | 1976-12-07 | 1977-04-01 | Dispositif correcteur d'erreur pour decodeur de mot de code |
-
1977
- 1977-04-25 US US05/790,506 patent/US4100403A/en not_active Expired - Lifetime
-
1978
- 1978-03-23 FR FR7809187A patent/FR2389198A1/fr active Granted
- 1978-03-28 JP JP3495678A patent/JPS53132951A/ja active Granted
- 1978-04-18 DE DE19782816771 patent/DE2816771A1/de not_active Withdrawn
- 1978-04-19 GB GB15491/78A patent/GB1580869A/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
DE2816771A1 (de) | 1978-10-26 |
JPS5746160B2 (ja) | 1982-10-01 |
US4100403A (en) | 1978-07-11 |
GB1580869A (en) | 1980-12-03 |
FR2389198B1 (ja) | 1983-02-25 |
FR2389198A1 (fr) | 1978-11-24 |
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