JPS53112013A - Channel selection unit - Google Patents

Channel selection unit

Info

Publication number
JPS53112013A
JPS53112013A JP2679477A JP2679477A JPS53112013A JP S53112013 A JPS53112013 A JP S53112013A JP 2679477 A JP2679477 A JP 2679477A JP 2679477 A JP2679477 A JP 2679477A JP S53112013 A JPS53112013 A JP S53112013A
Authority
JP
Japan
Prior art keywords
channel selection
selection unit
pll
making
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2679477A
Other languages
Japanese (ja)
Inventor
Yoshio Koga
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP2679477A priority Critical patent/JPS53112013A/en
Publication of JPS53112013A publication Critical patent/JPS53112013A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number

Landscapes

  • Superheterodyne Receivers (AREA)
  • Channel Selection Circuits, Automatic Tuning Circuits (AREA)

Abstract

PURPOSE:To perform channel selection and also to make easy large scale integration, by making the selection control of the output for the frequency dividing circuit of PLL.
JP2679477A 1977-03-10 1977-03-10 Channel selection unit Pending JPS53112013A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2679477A JPS53112013A (en) 1977-03-10 1977-03-10 Channel selection unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2679477A JPS53112013A (en) 1977-03-10 1977-03-10 Channel selection unit

Publications (1)

Publication Number Publication Date
JPS53112013A true JPS53112013A (en) 1978-09-30

Family

ID=12203218

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2679477A Pending JPS53112013A (en) 1977-03-10 1977-03-10 Channel selection unit

Country Status (1)

Country Link
JP (1) JPS53112013A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4969058A (en) * 1972-11-07 1974-07-04

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4969058A (en) * 1972-11-07 1974-07-04

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