JPS53103163U - - Google Patents

Info

Publication number
JPS53103163U
JPS53103163U JP1977007542U JP754277U JPS53103163U JP S53103163 U JPS53103163 U JP S53103163U JP 1977007542 U JP1977007542 U JP 1977007542U JP 754277 U JP754277 U JP 754277U JP S53103163 U JPS53103163 U JP S53103163U
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1977007542U
Other languages
Japanese (ja)
Other versions
JPS5718779Y2 (en:Method
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1977007542U priority Critical patent/JPS5718779Y2/ja
Publication of JPS53103163U publication Critical patent/JPS53103163U/ja
Application granted granted Critical
Publication of JPS5718779Y2 publication Critical patent/JPS5718779Y2/ja
Expired legal-status Critical Current

Links

Landscapes

  • Multi-Conductor Connections (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
JP1977007542U 1977-01-25 1977-01-25 Expired JPS5718779Y2 (en:Method)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1977007542U JPS5718779Y2 (en:Method) 1977-01-25 1977-01-25

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1977007542U JPS5718779Y2 (en:Method) 1977-01-25 1977-01-25

Publications (2)

Publication Number Publication Date
JPS53103163U true JPS53103163U (en:Method) 1978-08-19
JPS5718779Y2 JPS5718779Y2 (en:Method) 1982-04-20

Family

ID=28694141

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1977007542U Expired JPS5718779Y2 (en:Method) 1977-01-25 1977-01-25

Country Status (1)

Country Link
JP (1) JPS5718779Y2 (en:Method)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5764996A (en) * 1980-10-07 1982-04-20 Mitsubishi Electric Corp Method of assembling hybrid integrated circuit device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5764996A (en) * 1980-10-07 1982-04-20 Mitsubishi Electric Corp Method of assembling hybrid integrated circuit device

Also Published As

Publication number Publication date
JPS5718779Y2 (en:Method) 1982-04-20

Similar Documents

Publication Publication Date Title
FR2378310B1 (en:Method)
FR2378091B1 (en:Method)
FR2378750B1 (en:Method)
FR2378894B1 (en:Method)
FR2378738B1 (en:Method)
FR2376798B1 (en:Method)
AU3353778A (en:Method)
FR2376799B3 (en:Method)
JPS53112769U (en:Method)
FR2376622B3 (en:Method)
AU495917B2 (en:Method)
CS192242B1 (en:Method)
AU71461S (en:Method)
DK579977A (en:Method)
BG25812A1 (en:Method)
BG25826A1 (en:Method)
BE868323A (en:Method)
BG25852A1 (en:Method)
BE871419A (en:Method)
BG25851A1 (en:Method)
BG25834A1 (en:Method)
BE870787A (en:Method)
BG25841A1 (en:Method)
CH609544A5 (en:Method)
BG25853A1 (en:Method)