JPS5287347A - Synchronous pulse gate circuit - Google Patents

Synchronous pulse gate circuit

Info

Publication number
JPS5287347A
JPS5287347A JP325776A JP325776A JPS5287347A JP S5287347 A JPS5287347 A JP S5287347A JP 325776 A JP325776 A JP 325776A JP 325776 A JP325776 A JP 325776A JP S5287347 A JPS5287347 A JP S5287347A
Authority
JP
Japan
Prior art keywords
gate circuit
synchronous pulse
pulse gate
sff
multiplexor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP325776A
Other languages
Japanese (ja)
Inventor
Kazuo Yamaguchi
Yasuomi Sawai
Shingo Yamamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP325776A priority Critical patent/JPS5287347A/en
Publication of JPS5287347A publication Critical patent/JPS5287347A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/135—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals by the use of time reference signals, e.g. clock signals

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Control Of Ac Motors In General (AREA)

Abstract

PURPOSE:To made time control possible to start and stop a motor accurately, by generating a start signal synchronizing with a timing pulse by means of a gate circuit consisting of a single stabilized multiplexor R-SFF and an inverter.
JP325776A 1976-01-16 1976-01-16 Synchronous pulse gate circuit Pending JPS5287347A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP325776A JPS5287347A (en) 1976-01-16 1976-01-16 Synchronous pulse gate circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP325776A JPS5287347A (en) 1976-01-16 1976-01-16 Synchronous pulse gate circuit

Publications (1)

Publication Number Publication Date
JPS5287347A true JPS5287347A (en) 1977-07-21

Family

ID=11552407

Family Applications (1)

Application Number Title Priority Date Filing Date
JP325776A Pending JPS5287347A (en) 1976-01-16 1976-01-16 Synchronous pulse gate circuit

Country Status (1)

Country Link
JP (1) JPS5287347A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4922834U (en) * 1972-05-29 1974-02-26

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4922834U (en) * 1972-05-29 1974-02-26

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