JPS5255404A - Memory switch type time division circuit exchange system - Google Patents

Memory switch type time division circuit exchange system

Info

Publication number
JPS5255404A
JPS5255404A JP50131640A JP13164075A JPS5255404A JP S5255404 A JPS5255404 A JP S5255404A JP 50131640 A JP50131640 A JP 50131640A JP 13164075 A JP13164075 A JP 13164075A JP S5255404 A JPS5255404 A JP S5255404A
Authority
JP
Japan
Prior art keywords
time division
exchange system
division circuit
switch type
type time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP50131640A
Other languages
Japanese (ja)
Other versions
JPS5544510B2 (en
Inventor
Hiroaki Sato
Takuto Kojima
Shunichi Naito
Hiroshi Kaiyo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Nippon Telegraph and Telephone Corp
Original Assignee
Fujitsu Ltd
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, Nippon Telegraph and Telephone Corp filed Critical Fujitsu Ltd
Priority to JP50131640A priority Critical patent/JPS5255404A/en
Publication of JPS5255404A publication Critical patent/JPS5255404A/en
Publication of JPS5544510B2 publication Critical patent/JPS5544510B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
  • Time-Division Multiplex Systems (AREA)

Abstract

PURPOSE:The channel conversion memory (data pass memory) performs frame matching simultaeously in order to minimize necessary memory quantity as wall as to reduce delay time from in-highway to out-highway.
JP50131640A 1975-10-31 1975-10-31 Memory switch type time division circuit exchange system Granted JPS5255404A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50131640A JPS5255404A (en) 1975-10-31 1975-10-31 Memory switch type time division circuit exchange system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50131640A JPS5255404A (en) 1975-10-31 1975-10-31 Memory switch type time division circuit exchange system

Publications (2)

Publication Number Publication Date
JPS5255404A true JPS5255404A (en) 1977-05-06
JPS5544510B2 JPS5544510B2 (en) 1980-11-12

Family

ID=15062770

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50131640A Granted JPS5255404A (en) 1975-10-31 1975-10-31 Memory switch type time division circuit exchange system

Country Status (1)

Country Link
JP (1) JPS5255404A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6961343B1 (en) 1998-10-30 2005-11-01 Fujitsu Limited Cross-connection switch

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6961343B1 (en) 1998-10-30 2005-11-01 Fujitsu Limited Cross-connection switch

Also Published As

Publication number Publication date
JPS5544510B2 (en) 1980-11-12

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