JPS5254358A - Delay circuit - Google Patents

Delay circuit

Info

Publication number
JPS5254358A
JPS5254358A JP50129906A JP12990675A JPS5254358A JP S5254358 A JPS5254358 A JP S5254358A JP 50129906 A JP50129906 A JP 50129906A JP 12990675 A JP12990675 A JP 12990675A JP S5254358 A JPS5254358 A JP S5254358A
Authority
JP
Japan
Prior art keywords
delay circuit
clock signal
circuit
delays
destroying
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP50129906A
Other languages
Japanese (ja)
Other versions
JPS5651662B2 (en
Inventor
Junichi Mogi
Kiyoshi Miyasaka
Seiji Emoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP50129906A priority Critical patent/JPS5254358A/en
Publication of JPS5254358A publication Critical patent/JPS5254358A/en
Publication of JPS5651662B2 publication Critical patent/JPS5651662B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/133Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals using a chain of active delay devices
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K2005/00013Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
    • H03K2005/0015Layout of the delay element
    • H03K2005/00195Layout of the delay element using FET's

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Pulse Circuits (AREA)
  • Manipulation Of Pulses (AREA)
  • Electronic Switches (AREA)
  • Logic Circuits (AREA)

Abstract

PURPOSE:An intermittently charging capacitor is provided to the circuit which delays the clock signal to form a simple circuit which delays the clock signal by the desired time without destroying the waveform of the clock signal; and this circuit should have a construction which facilitates IC-implementation.
JP50129906A 1975-10-30 1975-10-30 Delay circuit Granted JPS5254358A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50129906A JPS5254358A (en) 1975-10-30 1975-10-30 Delay circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50129906A JPS5254358A (en) 1975-10-30 1975-10-30 Delay circuit

Publications (2)

Publication Number Publication Date
JPS5254358A true JPS5254358A (en) 1977-05-02
JPS5651662B2 JPS5651662B2 (en) 1981-12-07

Family

ID=15021306

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50129906A Granted JPS5254358A (en) 1975-10-30 1975-10-30 Delay circuit

Country Status (1)

Country Link
JP (1) JPS5254358A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6143811A (en) * 1984-07-05 1986-03-03 Yokogawa Hewlett Packard Ltd Delay circuit
JPH04356790A (en) * 1991-07-11 1992-12-10 Mitsubishi Electric Corp Semiconductor integrated circuit
US6198327B1 (en) 1998-03-13 2001-03-06 Nec Corporation Pulse generator with improved high speed performance for generating a constant pulse width
JP2015528974A (en) * 2012-07-30 2015-10-01 京東方科技集團股▲ふん▼有限公司 Shift register unit, shift register and display device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6143811A (en) * 1984-07-05 1986-03-03 Yokogawa Hewlett Packard Ltd Delay circuit
JPH04356790A (en) * 1991-07-11 1992-12-10 Mitsubishi Electric Corp Semiconductor integrated circuit
US6198327B1 (en) 1998-03-13 2001-03-06 Nec Corporation Pulse generator with improved high speed performance for generating a constant pulse width
JP2015528974A (en) * 2012-07-30 2015-10-01 京東方科技集團股▲ふん▼有限公司 Shift register unit, shift register and display device

Also Published As

Publication number Publication date
JPS5651662B2 (en) 1981-12-07

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