JPS5236675B2 - - Google Patents

Info

Publication number
JPS5236675B2
JPS5236675B2 JP1045273A JP1045273A JPS5236675B2 JP S5236675 B2 JPS5236675 B2 JP S5236675B2 JP 1045273 A JP1045273 A JP 1045273A JP 1045273 A JP1045273 A JP 1045273A JP S5236675 B2 JPS5236675 B2 JP S5236675B2
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1045273A
Other languages
Japanese (ja)
Other versions
JPS4999274A (fr
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1045273A priority Critical patent/JPS5236675B2/ja
Priority to DE2403641A priority patent/DE2403641A1/de
Publication of JPS4999274A publication Critical patent/JPS4999274A/ja
Publication of JPS5236675B2 publication Critical patent/JPS5236675B2/ja
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42396Gate electrodes for field effect devices for charge coupled devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4846Leads on or in insulating or insulated substrates, e.g. metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823406Combination of charge coupled devices, i.e. CCD, or BBD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/4824Pads with extended contours, e.g. grid structure, branch structure, finger structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • ing And Chemical Polishing (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
  • Weting (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
JP1045273A 1973-01-25 1973-01-25 Expired JPS5236675B2 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP1045273A JPS5236675B2 (fr) 1973-01-25 1973-01-25
DE2403641A DE2403641A1 (de) 1973-01-25 1974-01-25 Verfahren zur herstellung von feinen mustern

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1045273A JPS5236675B2 (fr) 1973-01-25 1973-01-25

Publications (2)

Publication Number Publication Date
JPS4999274A JPS4999274A (fr) 1974-09-19
JPS5236675B2 true JPS5236675B2 (fr) 1977-09-17

Family

ID=11750521

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1045273A Expired JPS5236675B2 (fr) 1973-01-25 1973-01-25

Country Status (2)

Country Link
JP (1) JPS5236675B2 (fr)
DE (1) DE2403641A1 (fr)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2432719B2 (de) * 1974-07-08 1977-06-02 Siemens AG, 1000 Berlin und 8000 München Verfahren zum erzeugen von feinen strukturen aus aufdampfbaren materialien auf einer unterlage und anwendung des verfahrens
GB1527894A (en) * 1975-10-15 1978-10-11 Mullard Ltd Methods of manufacturing electronic devices
JPS54107675A (en) * 1978-02-10 1979-08-23 Matsushita Electric Ind Co Ltd Manufacture for semicnductor device
JPS5669835A (en) * 1979-11-09 1981-06-11 Japan Electronic Ind Dev Assoc<Jeida> Method for forming thin film pattern
JPS5687326A (en) * 1979-12-17 1981-07-15 Sony Corp Method of forming wiring
US4385202A (en) * 1980-09-25 1983-05-24 Texas Instruments Incorporated Electronic circuit interconnection system
DE102006035749A1 (de) * 2006-07-28 2008-01-31 Leonhard Kurz Gmbh & Co. Kg Verfahren zur Herstellung mindestens eines Bauteils sowie Bauteil

Also Published As

Publication number Publication date
DE2403641A1 (de) 1974-08-01
JPS4999274A (fr) 1974-09-19

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