JPS5235951A - Memory signal detection unit - Google Patents

Memory signal detection unit

Info

Publication number
JPS5235951A
JPS5235951A JP50111929A JP11192975A JPS5235951A JP S5235951 A JPS5235951 A JP S5235951A JP 50111929 A JP50111929 A JP 50111929A JP 11192975 A JP11192975 A JP 11192975A JP S5235951 A JPS5235951 A JP S5235951A
Authority
JP
Japan
Prior art keywords
circuit
lines
capacitances
detection unit
signal detection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP50111929A
Other languages
Japanese (ja)
Inventor
Takao Yano
Nobuaki Ieda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP50111929A priority Critical patent/JPS5235951A/en
Priority to DE2634089A priority patent/DE2634089C3/en
Priority to FR7624132A priority patent/FR2321173A1/en
Priority to US05/712,708 priority patent/US4070590A/en
Priority to CA258,893A priority patent/CA1050117A/en
Priority to NLAANVRAGE7608932,A priority patent/NL177362C/en
Publication of JPS5235951A publication Critical patent/JPS5235951A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4094—Bit-line management or control circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)

Abstract

PURPOSE:In the circuit consisting of common lines B1 and B2, memory circuit element A1, A2, ...An+m, detecting circuit D, signal terminals F1 and F1, MIS transistors MM, Q1 thru Q5, capacitor CM, equivalent capacitances CB1 and CB2, charging voltage generating circuits I1 and I2, reference voltage generating circuits J1 and J2, control terminals K1, K2...Kn+m, and H1 and H2 2, when the detector circuit D is in operation, the circuit D is constituted such that is is cut off by switches SW1 and SW2 from lines B1 and B2, when the detector circuit D is in operation, the circuit D is constituted such that it is cut off by switches SW1 and SW2 from lines B1 and B2. Accordingly, capacitances CB1 and CB2 are not connected to terminals F1 and F2, then the capacitances CB1 and CB2 equivalently connected to lines B1 and B2 in the operation of circuit D are not charged or discharged. Consequently, since the detector circuit D operates with high sensitivity and high speed, high sensitive and high speedy operation, as a whole, can be obtained.
JP50111929A 1975-08-11 1975-09-16 Memory signal detection unit Pending JPS5235951A (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP50111929A JPS5235951A (en) 1975-09-16 1975-09-16 Memory signal detection unit
DE2634089A DE2634089C3 (en) 1975-08-11 1976-07-29 Circuit arrangement for detecting weak signals
FR7624132A FR2321173A1 (en) 1975-08-11 1976-08-06 LOW SIGNAL DETECTION CIRCUIT FOR SEMICONDUCTOR MEMORY
US05/712,708 US4070590A (en) 1975-08-11 1976-08-09 Sensing circuit for memory cells
CA258,893A CA1050117A (en) 1975-08-11 1976-08-11 Sensing circuit for memory cells
NLAANVRAGE7608932,A NL177362C (en) 1975-08-11 1976-08-11 DETECTION CIRCUIT FOR AN INTEGRATED SEMICONDUCTOR MEMORY CIRCUIT.

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50111929A JPS5235951A (en) 1975-09-16 1975-09-16 Memory signal detection unit

Publications (1)

Publication Number Publication Date
JPS5235951A true JPS5235951A (en) 1977-03-18

Family

ID=14573654

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50111929A Pending JPS5235951A (en) 1975-08-11 1975-09-16 Memory signal detection unit

Country Status (1)

Country Link
JP (1) JPS5235951A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4393472A (en) * 1979-12-27 1983-07-12 Fujitsu Limited Semiconductor memory circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4393472A (en) * 1979-12-27 1983-07-12 Fujitsu Limited Semiconductor memory circuit

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